URL https://opencores.org/ocsvn/s1_core/s1_core/trunk

Subversion Repositories s1_core

[/] [s1_core/] [trunk/] [docs/] [SYNTHESIS.txt] - Diff between revs 111 and 114

Rev 111	Rev 114
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`Simply RISC S1 Core - Synthesis Environment`	`S1 Core - Synthesis Environment`
`===========================================`	`===============================`

`The scripts to run synthesis are similar to the ones`	`The scripts to run synthesis are similar to the ones`
`used for simulations, you can still use the free Icarus`	`used for simulations, you can still use the free Icarus`
`Verilog software (that will target an FPGA application)`	`Verilog software (that will target an FPGA application)`
`or a commercial Design Compiler tool from Synopsys (that`	`or a commercial Design Compiler tool from Synopsys (that`