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[/] [s1_core/] [trunk/] [hdl/] [rtl/] [sparc_core/] [sparc_exu_rml_cwp.v] - Diff between revs 105 and 113

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// You should have received a copy of the GNU General Public
// You should have received a copy of the GNU General Public
// License along with this work; if not, write to the Free Software
// License along with this work; if not, write to the Free Software
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
// 
// 
// ========== Copyright Header End ============================================
// ========== Copyright Header End ============================================
 
`ifdef SIMPLY_RISC_TWEAKS
 
`define SIMPLY_RISC_SCANIN .si(0)
 
`else
 
`define SIMPLY_RISC_SCANIN .si()
 
`endif
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/*
/*
//  Module Name: sparc_exu_rml_cwp
//  Module Name: sparc_exu_rml_cwp
//      Description: Register management logic.  Contains CWP, CANSAVE, CANRESTORE
//      Description: Register management logic.  Contains CWP, CANSAVE, CANRESTORE
//              and other window management registers.  Generates RF related traps
//              and other window management registers.  Generates RF related traps
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                             .sel1(cwp_wen_thr3_w),
                             .sel1(cwp_wen_thr3_w),
                             .sel2(cwp_wen_tlu_w[3]),
                             .sel2(cwp_wen_tlu_w[3]),
                             .sel3(cwp_wen_spill[3]));
                             .sel3(cwp_wen_spill[3]));
 
 
   // store new value
   // store new value
   dff #(3) dff_cwp_thr0(.din(cwp_thr0_next[2:0]), .clk(clk), .q(cwp_thr0[2:0]),
   dff_s #(3) dff_cwp_thr0(.din(cwp_thr0_next[2:0]), .clk(clk), .q(cwp_thr0[2:0]),
                       .se(se), .si(), .so());
                       .se(se), `SIMPLY_RISC_SCANIN, .so());
   dff #(3) dff_cwp_thr1(.din(cwp_thr1_next[2:0]), .clk(clk), .q(cwp_thr1[2:0]),
   dff_s #(3) dff_cwp_thr1(.din(cwp_thr1_next[2:0]), .clk(clk), .q(cwp_thr1[2:0]),
                       .se(se), .si(), .so());
                       .se(se), `SIMPLY_RISC_SCANIN, .so());
   dff #(3) dff_cwp_thr2(.din(cwp_thr2_next[2:0]), .clk(clk), .q(cwp_thr2[2:0]),
   dff_s #(3) dff_cwp_thr2(.din(cwp_thr2_next[2:0]), .clk(clk), .q(cwp_thr2[2:0]),
                       .se(se), .si(), .so());
                       .se(se), `SIMPLY_RISC_SCANIN, .so());
   dff #(3) dff_cwp_thr3(.din(cwp_thr3_next[2:0]), .clk(clk), .q(cwp_thr3[2:0]),
   dff_s #(3) dff_cwp_thr3(.din(cwp_thr3_next[2:0]), .clk(clk), .q(cwp_thr3[2:0]),
                       .se(se), .si(), .so());
                       .se(se), `SIMPLY_RISC_SCANIN, .so());
 
 
 
 
 
 
   ////////////////////////////////////////////
   ////////////////////////////////////////////
   // Queue for full window swaps
   // Queue for full window swaps
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   //   6   - !WRCWP/SPILL
   //   6   - !WRCWP/SPILL
   //   7   - Trap return
   //   7   - Trap return
   //   8   - OTHER (for spill trap)
   //   8   - OTHER (for spill trap)
   //   11:9- WTYPE (for spill trap)
   //   11:9- WTYPE (for spill trap)
   //           12  - Retry (for trap return)
   //           12  - Retry (for trap return)
   dff full_swap_e2m(.din(full_swap_e), .clk(clk), .q(full_swap_m), .se(se), .si(), .so());
   dff_s full_swap_e2m(.din(full_swap_e), .clk(clk), .q(full_swap_m), .se(se), `SIMPLY_RISC_SCANIN, .so());
   dff full_swap_m2w(.din(full_swap_m), .clk(clk), .q(full_swap_w), .se(se), .si(), .so());
   dff_s full_swap_m2w(.din(full_swap_m), .clk(clk), .q(full_swap_w), .se(se), `SIMPLY_RISC_SCANIN, .so());
   assign     swap_input_data = {1'b0, rml_ecl_wtype_e[2:0], rml_ecl_other_e, 1'b0, exu_tlu_spill_e,
   assign     swap_input_data = {1'b0, rml_ecl_wtype_e[2:0], rml_ecl_other_e, 1'b0, exu_tlu_spill_e,
                                 next_cwp_e[2:0],rml_ecl_cwp_e[2:0]};
                                 next_cwp_e[2:0],rml_ecl_cwp_e[2:0]};
   assign     tlu_swap_data = {tlu_exu_cwp_retry_w, 4'b0, 1'b1, 1'b0, tlu_exu_cwp_w[2:0], old_cwp_w[2:0]};
   assign     tlu_swap_data = {tlu_exu_cwp_retry_w, 4'b0, 1'b1, 1'b0, tlu_exu_cwp_w[2:0], old_cwp_w[2:0]};
 
 
 
 
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                                             (swap_slot2_state[0])};
                                             (swap_slot2_state[0])};
   assign     swap_slot3_state_valid[1:0] = {(swap_slot3_state[1] & ~(kill_swap_slot_w & ecl_rml_thr_w[3])),
   assign     swap_slot3_state_valid[1:0] = {(swap_slot3_state[1] & ~(kill_swap_slot_w & ecl_rml_thr_w[3])),
                                             (swap_slot3_state[0])};
                                             (swap_slot3_state[0])};
 
 
   // Flops for cwp_swap data
   // Flops for cwp_swap data
   dffr #(15) slot0_data_dff(.din({next_slot0_state[1:0], next_slot0_data[12:0]}), .clk(clk),
   dffr_s #(15) slot0_data_dff(.din({next_slot0_state[1:0], next_slot0_data[12:0]}), .clk(clk),
                            .q({swap_slot0_state[1:0], swap_slot0_data[12:0]}), .rst(reset),
                            .q({swap_slot0_state[1:0], swap_slot0_data[12:0]}), .rst(reset),
                            .se(se), .si(), .so());
                            .se(se), `SIMPLY_RISC_SCANIN, .so());
   dffr #(15) slot1_data_dff(.din({next_slot1_state[1:0], next_slot1_data[12:0]}), .clk(clk),
   dffr_s #(15) slot1_data_dff(.din({next_slot1_state[1:0], next_slot1_data[12:0]}), .clk(clk),
                            .q({swap_slot1_state[1:0], swap_slot1_data[12:0]}), .rst(reset),
                            .q({swap_slot1_state[1:0], swap_slot1_data[12:0]}), .rst(reset),
                            .se(se), .si(), .so());
                            .se(se), `SIMPLY_RISC_SCANIN, .so());
   dffr #(15) slot2_data_dff(.din({next_slot2_state[1:0], next_slot2_data[12:0]}), .clk(clk),
   dffr_s #(15) slot2_data_dff(.din({next_slot2_state[1:0], next_slot2_data[12:0]}), .clk(clk),
                            .q({swap_slot2_state[1:0], swap_slot2_data[12:0]}), .rst(reset),
                            .q({swap_slot2_state[1:0], swap_slot2_data[12:0]}), .rst(reset),
                            .se(se), .si(), .so());
                            .se(se), `SIMPLY_RISC_SCANIN, .so());
   dffr #(15) slot3_data_dff(.din({next_slot3_state[1:0], next_slot3_data[12:0]}), .clk(clk),
   dffr_s #(15) slot3_data_dff(.din({next_slot3_state[1:0], next_slot3_data[12:0]}), .clk(clk),
                            .q({swap_slot3_state[1:0], swap_slot3_data[12:0]}), .rst(reset),
                            .q({swap_slot3_state[1:0], swap_slot3_data[12:0]}), .rst(reset),
                            .se(se), .si(), .so());
                            .se(se), `SIMPLY_RISC_SCANIN, .so());
 
 
   ////////////////////////////
   ////////////////////////////
   // Control for queue output
   // Control for queue output
   //   ==========================
   //   ==========================
   //   The queue results go into a flop
   //   The queue results go into a flop
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                                     .clk(clk),
                                     .clk(clk),
                                     .reset(reset),
                                     .reset(reset),
                                     .se(se),
                                     .se(se),
                                     .req_vec(swap_req_vec[3:0]),
                                     .req_vec(swap_req_vec[3:0]),
                                     .advance(can_swap));
                                     .advance(can_swap));
   dff #(4) dff_swap_thr(.din(next_swap_thr[3:0]), .clk(clk), .q(swap_thr[3:0]),
   dff_s #(4) dff_swap_thr(.din(next_swap_thr[3:0]), .clk(clk), .q(swap_thr[3:0]),
                         .se(se), .si(), .so());
                         .se(se), `SIMPLY_RISC_SCANIN, .so());
   assign     swap_tid[1] = swap_thr[3] | swap_thr[2];
   assign     swap_tid[1] = swap_thr[3] | swap_thr[2];
   assign     swap_tid[0] = swap_thr[3] | swap_thr[1];
   assign     swap_tid[0] = swap_thr[3] | swap_thr[1];
 
 
   // make selects one hot
   // make selects one hot
   wire [3:0] swap_sel;
   wire [3:0] swap_sel;
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                               .sel2(swap_sel[2]),
                               .sel2(swap_sel[2]),
                               .sel3(swap_sel[3]));
                               .sel3(swap_sel[3]));
 
 
   // To prevent back to back swap requests on the same thread, the queue cannot swap
   // To prevent back to back swap requests on the same thread, the queue cannot swap
   // 2 cycles in a row.  Also swaps can't start in M or W to allow flush to be checked
   // 2 cycles in a row.  Also swaps can't start in M or W to allow flush to be checked
   dffr can_swap_flop(.din(swapping), .clk(clk), .q(just_swapped), .rst(reset), .se(se), .si(), .so());
   dffr_s can_swap_flop(.din(swapping), .clk(clk), .q(just_swapped), .rst(reset), .se(se), `SIMPLY_RISC_SCANIN, .so());
   assign     can_swap = ~(save_e | restore_e | ifu_exu_flushw_e | ecl_rml_cwp_wen_e | just_swapped);
   assign     can_swap = ~(save_e | restore_e | ifu_exu_flushw_e | ecl_rml_cwp_wen_e | just_swapped);
   assign      swap_locals_ins = can_swap & swap_state[0];
   assign      swap_locals_ins = can_swap & swap_state[0];
   assign      swap_outs = can_swap & swap_state[1];
   assign      swap_outs = can_swap & swap_state[1];
   assign      swapping = (can_swap & |swap_state[1:0]) | full_swap_e | full_swap_m;
   assign      swapping = (can_swap & |swap_state[1:0]) | full_swap_e | full_swap_m;
 
 
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   assign spill_next = swap_data[6] & ~swap_data[7] & swap_outs;
   assign spill_next = swap_data[6] & ~swap_data[7] & swap_outs;
   assign spill_tid_next[1:0] = swap_tid[1:0];
   assign spill_tid_next[1:0] = swap_tid[1:0];
   //assign exu_tlu_spill_ttype[8:0] = {3'b010, swap_data[8], swap_data[11:9], 2'b00};
   //assign exu_tlu_spill_ttype[8:0] = {3'b010, swap_data[8], swap_data[11:9], 2'b00};
   assign spill_other_next = swap_data[8];
   assign spill_other_next = swap_data[8];
   assign spill_wtype_next[2:0] = swap_data[11:9];
   assign spill_wtype_next[2:0] = swap_data[11:9];
   dff #(7) spill_dff(.din({spill_next,spill_tid_next[1:0], spill_other_next, spill_wtype_next[2:0]}),
   dff_s #(7) spill_dff(.din({spill_next,spill_tid_next[1:0], spill_other_next, spill_wtype_next[2:0]}),
                      .q({exu_tlu_spill,exu_tlu_spill_tid[1:0], exu_tlu_spill_other, exu_tlu_spill_wtype[2:0]}),
                      .q({exu_tlu_spill,exu_tlu_spill_tid[1:0], exu_tlu_spill_other, exu_tlu_spill_wtype[2:0]}),
                      .clk(clk), .se(se), .si(), .so());
                      .clk(clk), .se(se), `SIMPLY_RISC_SCANIN, .so());
   assign spill_cwp[2:0] = swap_data[5:3];
   assign spill_cwp[2:0] = swap_data[5:3];
/* -----\/----- EXCLUDED -----\/-----
/* -----\/----- EXCLUDED -----\/-----
   dff #(3) spill_cwp_dff(.din(swap_data[5:3]), .clk(clk), .q(spill_cwp[2:0]),
   dff_s #(3) spill_cwp_dff(.din(swap_data[5:3]), .clk(clk), .q(spill_cwp[2:0]),
                          .se(se), .si(), .so());
                          .se(se), `SIMPLY_RISC_SCANIN, .so());
 -----/\----- EXCLUDED -----/\----- */
 -----/\----- EXCLUDED -----/\----- */
   assign swap_done_next_cycle[3] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
   assign swap_done_next_cycle[3] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
                                     swap_tid[1] & swap_tid[0]);
                                     swap_tid[1] & swap_tid[0]);
   assign swap_done_next_cycle[2] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
   assign swap_done_next_cycle[2] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
                                     swap_tid[1] & ~swap_tid[0]);
                                     swap_tid[1] & ~swap_tid[0]);
   assign swap_done_next_cycle[1] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
   assign swap_done_next_cycle[1] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
                                     ~swap_tid[1] & swap_tid[0]);
                                     ~swap_tid[1] & swap_tid[0]);
   assign swap_done_next_cycle[0] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
   assign swap_done_next_cycle[0] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
                                     ~swap_tid[1] & ~swap_tid[0]);
                                     ~swap_tid[1] & ~swap_tid[0]);
 
 
   dff #(4) swap_done_dff(.din(swap_done_next_cycle[3:0]), .clk(clk),
   dff_s #(4) swap_done_dff(.din(swap_done_next_cycle[3:0]), .clk(clk),
                        .q(rml_ecl_swap_done[3:0]), .se(se), .si(), .so());
                        .q(rml_ecl_swap_done[3:0]), .se(se), `SIMPLY_RISC_SCANIN, .so());
 
 
   dff #(4) cwp_cmplt_dff(.din({cwp_cmplt_next, cwp_cmplt_tid_next[1:0], cwp_retry_next}),
   dff_s #(4) cwp_cmplt_dff(.din({cwp_cmplt_next, cwp_cmplt_tid_next[1:0], cwp_retry_next}),
                          .q({exu_tlu_cwp_cmplt,exu_tlu_cwp_cmplt_tid[1:0], exu_tlu_cwp_retry}),
                          .q({exu_tlu_cwp_cmplt,exu_tlu_cwp_cmplt_tid[1:0], exu_tlu_cwp_retry}),
                          .clk(clk), .si(), .so(), .se(se));
                          .clk(clk), `SIMPLY_RISC_SCANIN, .so(), .se(se));
   assign cwp_cmplt_next = swap_outs & swap_data[7];
   assign cwp_cmplt_next = swap_outs & swap_data[7];
   assign cwp_cmplt_tid_next[1:0] = swap_tid[1:0];
   assign cwp_cmplt_tid_next[1:0] = swap_tid[1:0];
   assign cwp_retry_next = swap_data[12];
   assign cwp_retry_next = swap_data[12];
 
 
   assign tlu_cwp_xor[2:0] = trap_old_cwp_m[2:0] ^ tlu_exu_cwp_m[2:0];
   assign tlu_cwp_xor[2:0] = trap_old_cwp_m[2:0] ^ tlu_exu_cwp_m[2:0];
   assign tlu_cwp_no_change = ~(tlu_cwp_xor[2] | tlu_cwp_xor[1] | tlu_cwp_xor[0]);
   assign tlu_cwp_no_change = ~(tlu_cwp_xor[2] | tlu_cwp_xor[1] | tlu_cwp_xor[0]);
   assign cwp_fastcmplt_m = tlu_exu_cwpccr_update_m & tlu_cwp_no_change;
   assign cwp_fastcmplt_m = tlu_exu_cwpccr_update_m & tlu_cwp_no_change;
 
 
   dff fastcmplt_dff(.din(cwp_fastcmplt_m), .clk(clk),
   dff_s fastcmplt_dff(.din(cwp_fastcmplt_m), .clk(clk),
                     .q(cwp_fastcmplt_w), .se(se), .si(), .so());
                     .q(cwp_fastcmplt_w), .se(se), `SIMPLY_RISC_SCANIN, .so());
 
 
   ///////////////////////////////////////////////////////////
   ///////////////////////////////////////////////////////////
   // Pipe along tlu_exu_done/retry so inst_vld can be caught
   // Pipe along tlu_exu_done/retry so inst_vld can be caught
   ///////////////////////////////////////////////////////////
   ///////////////////////////////////////////////////////////
   dff #(5) tlu_data_dff(.q({cwpccr_update_w,tlu_exu_cwp_w[2:0],tlu_exu_cwp_retry_w}),
   dff_s #(5) tlu_data_dff(.q({cwpccr_update_w,tlu_exu_cwp_w[2:0],tlu_exu_cwp_retry_w}),
                         .din({tlu_exu_cwpccr_update_m,tlu_exu_cwp_m[2:0],tlu_exu_cwp_retry_m}),
                         .din({tlu_exu_cwpccr_update_m,tlu_exu_cwp_m[2:0],tlu_exu_cwp_retry_m}),
                         .clk(clk), .se(se), .si(), .so());
                         .clk(clk), .se(se), `SIMPLY_RISC_SCANIN, .so());
   assign valid_tlu_swap_w = cwpccr_update_w & ~rml_kill_w & ~cwp_fastcmplt_w;
   assign valid_tlu_swap_w = cwpccr_update_w & ~rml_kill_w & ~cwp_fastcmplt_w;
 
 
endmodule // sparc_exu_rml_cwp
endmodule // sparc_exu_rml_cwp
 
 
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