Line 16... |
Line 16... |
// You should have received a copy of the GNU General Public
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// You should have received a copy of the GNU General Public
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// License along with this work; if not, write to the Free Software
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// License along with this work; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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// Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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//
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//
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// ========== Copyright Header End ============================================
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// ========== Copyright Header End ============================================
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`ifdef SIMPLY_RISC_TWEAKS
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`define SIMPLY_RISC_SCANIN .si(0)
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`else
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`define SIMPLY_RISC_SCANIN .si()
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`endif
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////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////
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/*
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/*
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// Module Name: sparc_exu_rml_cwp
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// Module Name: sparc_exu_rml_cwp
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// Description: Register management logic. Contains CWP, CANSAVE, CANRESTORE
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// Description: Register management logic. Contains CWP, CANSAVE, CANRESTORE
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// and other window management registers. Generates RF related traps
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// and other window management registers. Generates RF related traps
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Line 292... |
Line 297... |
.sel1(cwp_wen_thr3_w),
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.sel1(cwp_wen_thr3_w),
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.sel2(cwp_wen_tlu_w[3]),
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.sel2(cwp_wen_tlu_w[3]),
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.sel3(cwp_wen_spill[3]));
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.sel3(cwp_wen_spill[3]));
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// store new value
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// store new value
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dff #(3) dff_cwp_thr0(.din(cwp_thr0_next[2:0]), .clk(clk), .q(cwp_thr0[2:0]),
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dff_s #(3) dff_cwp_thr0(.din(cwp_thr0_next[2:0]), .clk(clk), .q(cwp_thr0[2:0]),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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dff #(3) dff_cwp_thr1(.din(cwp_thr1_next[2:0]), .clk(clk), .q(cwp_thr1[2:0]),
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dff_s #(3) dff_cwp_thr1(.din(cwp_thr1_next[2:0]), .clk(clk), .q(cwp_thr1[2:0]),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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dff #(3) dff_cwp_thr2(.din(cwp_thr2_next[2:0]), .clk(clk), .q(cwp_thr2[2:0]),
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dff_s #(3) dff_cwp_thr2(.din(cwp_thr2_next[2:0]), .clk(clk), .q(cwp_thr2[2:0]),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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dff #(3) dff_cwp_thr3(.din(cwp_thr3_next[2:0]), .clk(clk), .q(cwp_thr3[2:0]),
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dff_s #(3) dff_cwp_thr3(.din(cwp_thr3_next[2:0]), .clk(clk), .q(cwp_thr3[2:0]),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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////////////////////////////////////////////
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////////////////////////////////////////////
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// Queue for full window swaps
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// Queue for full window swaps
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Line 318... |
Line 323... |
// 6 - !WRCWP/SPILL
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// 6 - !WRCWP/SPILL
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// 7 - Trap return
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// 7 - Trap return
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// 8 - OTHER (for spill trap)
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// 8 - OTHER (for spill trap)
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// 11:9- WTYPE (for spill trap)
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// 11:9- WTYPE (for spill trap)
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// 12 - Retry (for trap return)
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// 12 - Retry (for trap return)
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dff full_swap_e2m(.din(full_swap_e), .clk(clk), .q(full_swap_m), .se(se), .si(), .so());
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dff_s full_swap_e2m(.din(full_swap_e), .clk(clk), .q(full_swap_m), .se(se), `SIMPLY_RISC_SCANIN, .so());
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dff full_swap_m2w(.din(full_swap_m), .clk(clk), .q(full_swap_w), .se(se), .si(), .so());
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dff_s full_swap_m2w(.din(full_swap_m), .clk(clk), .q(full_swap_w), .se(se), `SIMPLY_RISC_SCANIN, .so());
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assign swap_input_data = {1'b0, rml_ecl_wtype_e[2:0], rml_ecl_other_e, 1'b0, exu_tlu_spill_e,
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assign swap_input_data = {1'b0, rml_ecl_wtype_e[2:0], rml_ecl_other_e, 1'b0, exu_tlu_spill_e,
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next_cwp_e[2:0],rml_ecl_cwp_e[2:0]};
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next_cwp_e[2:0],rml_ecl_cwp_e[2:0]};
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assign tlu_swap_data = {tlu_exu_cwp_retry_w, 4'b0, 1'b1, 1'b0, tlu_exu_cwp_w[2:0], old_cwp_w[2:0]};
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assign tlu_swap_data = {tlu_exu_cwp_retry_w, 4'b0, 1'b1, 1'b0, tlu_exu_cwp_w[2:0], old_cwp_w[2:0]};
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Line 417... |
Line 422... |
(swap_slot2_state[0])};
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(swap_slot2_state[0])};
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assign swap_slot3_state_valid[1:0] = {(swap_slot3_state[1] & ~(kill_swap_slot_w & ecl_rml_thr_w[3])),
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assign swap_slot3_state_valid[1:0] = {(swap_slot3_state[1] & ~(kill_swap_slot_w & ecl_rml_thr_w[3])),
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(swap_slot3_state[0])};
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(swap_slot3_state[0])};
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// Flops for cwp_swap data
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// Flops for cwp_swap data
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dffr #(15) slot0_data_dff(.din({next_slot0_state[1:0], next_slot0_data[12:0]}), .clk(clk),
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dffr_s #(15) slot0_data_dff(.din({next_slot0_state[1:0], next_slot0_data[12:0]}), .clk(clk),
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.q({swap_slot0_state[1:0], swap_slot0_data[12:0]}), .rst(reset),
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.q({swap_slot0_state[1:0], swap_slot0_data[12:0]}), .rst(reset),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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dffr #(15) slot1_data_dff(.din({next_slot1_state[1:0], next_slot1_data[12:0]}), .clk(clk),
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dffr_s #(15) slot1_data_dff(.din({next_slot1_state[1:0], next_slot1_data[12:0]}), .clk(clk),
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.q({swap_slot1_state[1:0], swap_slot1_data[12:0]}), .rst(reset),
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.q({swap_slot1_state[1:0], swap_slot1_data[12:0]}), .rst(reset),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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dffr #(15) slot2_data_dff(.din({next_slot2_state[1:0], next_slot2_data[12:0]}), .clk(clk),
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dffr_s #(15) slot2_data_dff(.din({next_slot2_state[1:0], next_slot2_data[12:0]}), .clk(clk),
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.q({swap_slot2_state[1:0], swap_slot2_data[12:0]}), .rst(reset),
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.q({swap_slot2_state[1:0], swap_slot2_data[12:0]}), .rst(reset),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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dffr #(15) slot3_data_dff(.din({next_slot3_state[1:0], next_slot3_data[12:0]}), .clk(clk),
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dffr_s #(15) slot3_data_dff(.din({next_slot3_state[1:0], next_slot3_data[12:0]}), .clk(clk),
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.q({swap_slot3_state[1:0], swap_slot3_data[12:0]}), .rst(reset),
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.q({swap_slot3_state[1:0], swap_slot3_data[12:0]}), .rst(reset),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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////////////////////////////
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////////////////////////////
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// Control for queue output
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// Control for queue output
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// ==========================
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// ==========================
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// The queue results go into a flop
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// The queue results go into a flop
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Line 449... |
Line 454... |
.clk(clk),
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.clk(clk),
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.reset(reset),
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.reset(reset),
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.se(se),
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.se(se),
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.req_vec(swap_req_vec[3:0]),
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.req_vec(swap_req_vec[3:0]),
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.advance(can_swap));
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.advance(can_swap));
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dff #(4) dff_swap_thr(.din(next_swap_thr[3:0]), .clk(clk), .q(swap_thr[3:0]),
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dff_s #(4) dff_swap_thr(.din(next_swap_thr[3:0]), .clk(clk), .q(swap_thr[3:0]),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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assign swap_tid[1] = swap_thr[3] | swap_thr[2];
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assign swap_tid[1] = swap_thr[3] | swap_thr[2];
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assign swap_tid[0] = swap_thr[3] | swap_thr[1];
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assign swap_tid[0] = swap_thr[3] | swap_thr[1];
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// make selects one hot
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// make selects one hot
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wire [3:0] swap_sel;
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wire [3:0] swap_sel;
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Line 471... |
Line 476... |
.sel2(swap_sel[2]),
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.sel2(swap_sel[2]),
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.sel3(swap_sel[3]));
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.sel3(swap_sel[3]));
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// To prevent back to back swap requests on the same thread, the queue cannot swap
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// To prevent back to back swap requests on the same thread, the queue cannot swap
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// 2 cycles in a row. Also swaps can't start in M or W to allow flush to be checked
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// 2 cycles in a row. Also swaps can't start in M or W to allow flush to be checked
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dffr can_swap_flop(.din(swapping), .clk(clk), .q(just_swapped), .rst(reset), .se(se), .si(), .so());
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dffr_s can_swap_flop(.din(swapping), .clk(clk), .q(just_swapped), .rst(reset), .se(se), `SIMPLY_RISC_SCANIN, .so());
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assign can_swap = ~(save_e | restore_e | ifu_exu_flushw_e | ecl_rml_cwp_wen_e | just_swapped);
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assign can_swap = ~(save_e | restore_e | ifu_exu_flushw_e | ecl_rml_cwp_wen_e | just_swapped);
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assign swap_locals_ins = can_swap & swap_state[0];
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assign swap_locals_ins = can_swap & swap_state[0];
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assign swap_outs = can_swap & swap_state[1];
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assign swap_outs = can_swap & swap_state[1];
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assign swapping = (can_swap & |swap_state[1:0]) | full_swap_e | full_swap_m;
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assign swapping = (can_swap & |swap_state[1:0]) | full_swap_e | full_swap_m;
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Line 490... |
assign spill_next = swap_data[6] & ~swap_data[7] & swap_outs;
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assign spill_next = swap_data[6] & ~swap_data[7] & swap_outs;
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assign spill_tid_next[1:0] = swap_tid[1:0];
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assign spill_tid_next[1:0] = swap_tid[1:0];
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//assign exu_tlu_spill_ttype[8:0] = {3'b010, swap_data[8], swap_data[11:9], 2'b00};
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//assign exu_tlu_spill_ttype[8:0] = {3'b010, swap_data[8], swap_data[11:9], 2'b00};
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assign spill_other_next = swap_data[8];
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assign spill_other_next = swap_data[8];
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assign spill_wtype_next[2:0] = swap_data[11:9];
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assign spill_wtype_next[2:0] = swap_data[11:9];
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dff #(7) spill_dff(.din({spill_next,spill_tid_next[1:0], spill_other_next, spill_wtype_next[2:0]}),
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dff_s #(7) spill_dff(.din({spill_next,spill_tid_next[1:0], spill_other_next, spill_wtype_next[2:0]}),
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.q({exu_tlu_spill,exu_tlu_spill_tid[1:0], exu_tlu_spill_other, exu_tlu_spill_wtype[2:0]}),
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.q({exu_tlu_spill,exu_tlu_spill_tid[1:0], exu_tlu_spill_other, exu_tlu_spill_wtype[2:0]}),
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.clk(clk), .se(se), .si(), .so());
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.clk(clk), .se(se), `SIMPLY_RISC_SCANIN, .so());
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assign spill_cwp[2:0] = swap_data[5:3];
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assign spill_cwp[2:0] = swap_data[5:3];
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/* -----\/----- EXCLUDED -----\/-----
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/* -----\/----- EXCLUDED -----\/-----
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dff #(3) spill_cwp_dff(.din(swap_data[5:3]), .clk(clk), .q(spill_cwp[2:0]),
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dff_s #(3) spill_cwp_dff(.din(swap_data[5:3]), .clk(clk), .q(spill_cwp[2:0]),
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.se(se), .si(), .so());
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.se(se), `SIMPLY_RISC_SCANIN, .so());
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-----/\----- EXCLUDED -----/\----- */
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-----/\----- EXCLUDED -----/\----- */
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assign swap_done_next_cycle[3] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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assign swap_done_next_cycle[3] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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swap_tid[1] & swap_tid[0]);
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swap_tid[1] & swap_tid[0]);
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assign swap_done_next_cycle[2] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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assign swap_done_next_cycle[2] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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swap_tid[1] & ~swap_tid[0]);
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swap_tid[1] & ~swap_tid[0]);
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assign swap_done_next_cycle[1] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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assign swap_done_next_cycle[1] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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~swap_tid[1] & swap_tid[0]);
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~swap_tid[1] & swap_tid[0]);
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assign swap_done_next_cycle[0] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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assign swap_done_next_cycle[0] = (swap_outs & ~swap_data[6] & ~swap_data[7] &
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~swap_tid[1] & ~swap_tid[0]);
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~swap_tid[1] & ~swap_tid[0]);
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dff #(4) swap_done_dff(.din(swap_done_next_cycle[3:0]), .clk(clk),
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dff_s #(4) swap_done_dff(.din(swap_done_next_cycle[3:0]), .clk(clk),
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.q(rml_ecl_swap_done[3:0]), .se(se), .si(), .so());
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.q(rml_ecl_swap_done[3:0]), .se(se), `SIMPLY_RISC_SCANIN, .so());
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dff #(4) cwp_cmplt_dff(.din({cwp_cmplt_next, cwp_cmplt_tid_next[1:0], cwp_retry_next}),
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dff_s #(4) cwp_cmplt_dff(.din({cwp_cmplt_next, cwp_cmplt_tid_next[1:0], cwp_retry_next}),
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.q({exu_tlu_cwp_cmplt,exu_tlu_cwp_cmplt_tid[1:0], exu_tlu_cwp_retry}),
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.q({exu_tlu_cwp_cmplt,exu_tlu_cwp_cmplt_tid[1:0], exu_tlu_cwp_retry}),
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.clk(clk), .si(), .so(), .se(se));
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.clk(clk), `SIMPLY_RISC_SCANIN, .so(), .se(se));
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assign cwp_cmplt_next = swap_outs & swap_data[7];
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assign cwp_cmplt_next = swap_outs & swap_data[7];
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assign cwp_cmplt_tid_next[1:0] = swap_tid[1:0];
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assign cwp_cmplt_tid_next[1:0] = swap_tid[1:0];
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assign cwp_retry_next = swap_data[12];
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assign cwp_retry_next = swap_data[12];
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assign tlu_cwp_xor[2:0] = trap_old_cwp_m[2:0] ^ tlu_exu_cwp_m[2:0];
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assign tlu_cwp_xor[2:0] = trap_old_cwp_m[2:0] ^ tlu_exu_cwp_m[2:0];
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assign tlu_cwp_no_change = ~(tlu_cwp_xor[2] | tlu_cwp_xor[1] | tlu_cwp_xor[0]);
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assign tlu_cwp_no_change = ~(tlu_cwp_xor[2] | tlu_cwp_xor[1] | tlu_cwp_xor[0]);
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assign cwp_fastcmplt_m = tlu_exu_cwpccr_update_m & tlu_cwp_no_change;
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assign cwp_fastcmplt_m = tlu_exu_cwpccr_update_m & tlu_cwp_no_change;
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dff fastcmplt_dff(.din(cwp_fastcmplt_m), .clk(clk),
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dff_s fastcmplt_dff(.din(cwp_fastcmplt_m), .clk(clk),
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.q(cwp_fastcmplt_w), .se(se), .si(), .so());
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.q(cwp_fastcmplt_w), .se(se), `SIMPLY_RISC_SCANIN, .so());
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///////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////
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// Pipe along tlu_exu_done/retry so inst_vld can be caught
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// Pipe along tlu_exu_done/retry so inst_vld can be caught
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///////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////
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dff #(5) tlu_data_dff(.q({cwpccr_update_w,tlu_exu_cwp_w[2:0],tlu_exu_cwp_retry_w}),
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dff_s #(5) tlu_data_dff(.q({cwpccr_update_w,tlu_exu_cwp_w[2:0],tlu_exu_cwp_retry_w}),
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.din({tlu_exu_cwpccr_update_m,tlu_exu_cwp_m[2:0],tlu_exu_cwp_retry_m}),
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.din({tlu_exu_cwpccr_update_m,tlu_exu_cwp_m[2:0],tlu_exu_cwp_retry_m}),
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.clk(clk), .se(se), .si(), .so());
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.clk(clk), .se(se), `SIMPLY_RISC_SCANIN, .so());
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assign valid_tlu_swap_w = cwpccr_update_w & ~rml_kill_w & ~cwp_fastcmplt_w;
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assign valid_tlu_swap_w = cwpccr_update_w & ~rml_kill_w & ~cwp_fastcmplt_w;
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endmodule // sparc_exu_rml_cwp
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endmodule // sparc_exu_rml_cwp
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No newline at end of file
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No newline at end of file
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