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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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// Filename: uartsim.cpp
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// Filename: uartsim.cpp
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//
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//
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// Project: FPGA library development (S6 development board)
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// Project: wbuart32, a full featured UART with simulator
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//
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//
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// Purpose: To emulate the external parameters of a UART device, providing
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// Purpose: To forward a Verilator simulated UART link over a TCP/IP pipe.
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// the UART output to, and input from, the command
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// console/terminal while also providing the controller with
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// appropriate busy lines as necessary.
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//
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//
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// Creator: Dan Gisselquist
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// Creator: Dan Gisselquist, Ph.D.
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// Gisselquist Tecnology, LLC
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// Gisselquist Technology, LLC
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//
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//
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// Copyright: 2016
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////////////////////////////////////////////////////////////////////////////////
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//
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// Copyright (C) 2015-2017, Gisselquist Technology, LLC
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//
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// This program is free software (firmware): you can redistribute it and/or
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// modify it under the terms of the GNU General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or (at
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// your option) any later version.
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//
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// This program is distributed in the hope that it will be useful, but WITHOUT
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// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with this program. (It's in the $(ROOT)/doc directory. Run make with no
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// target there if the PDF file isn't present.) If not, see
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// <http://www.gnu.org/licenses/> for a copy.
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//
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// License: GPL, v3, as defined and found on www.gnu.org,
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// http://www.gnu.org/licenses/gpl.html
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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//
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//
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//
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//
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#include <unistd.h>
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#include <fcntl.h>
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#include <stdio.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/types.h>
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#include <sys/socket.h>
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#include <poll.h>
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#include <unistd.h>
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#include <arpa/inet.h>
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#include <signal.h>
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#include <ctype.h>
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#include "uartsim.h"
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#include "uartsim.h"
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UARTSIM::UARTSIM(int baud_counts, int fdin, int fdout) {
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void UARTSIM::setup_listener(const int port) {
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int fctl_flags;
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struct sockaddr_in my_addr;
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signal(SIGPIPE, SIG_IGN);
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printf("Listening on port %d\n", port);
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m_skt = socket(AF_INET, SOCK_STREAM, 0);
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if (m_skt < 0) {
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perror("Could not allocate socket: ");
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exit(-1);
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}
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// Set the reuse address option
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{
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int optv = 1, er;
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er = setsockopt(m_skt, SOL_SOCKET, SO_REUSEADDR, &optv, sizeof(optv));
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if (er != 0) {
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perror("SockOpt Err:");
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exit(-1);
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}
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}
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memset(&my_addr, 0, sizeof(struct sockaddr_in)); // clear structure
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my_addr.sin_family = AF_INET;
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// Use *all* internet ports to this computer, allowing connections from
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// any/every one of them.
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my_addr.sin_addr.s_addr = htonl(INADDR_ANY);
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my_addr.sin_port = htons(port);
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if (bind(m_skt, (struct sockaddr *)&my_addr, sizeof(my_addr))!=0) {
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perror("BIND FAILED:");
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exit(-1);
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}
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if (listen(m_skt, 1) != 0) {
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perror("Listen failed:");
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exit(-1);
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}
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}
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UARTSIM::UARTSIM(const int port) {
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m_conrd = m_conwr = m_skt = -1;
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if (port == 0) {
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m_conrd = STDIN_FILENO;
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m_conwr = STDOUT_FILENO;
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} else
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setup_listener(port);
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setup(25); // Set us up for (default) 8N1 w/ a baud rate of CLK/25
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m_rx_baudcounter = 0;
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m_tx_baudcounter = 0;
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m_rx_state = RXIDLE;
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m_tx_state = TXIDLE;
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}
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m_fdin = fdin;
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void UARTSIM::kill(void) {
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m_fdout = fdout;
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fflush(stdout);
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m_baud_counts = baud_counts;
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m_tx_busy_count = 0;
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// Quickly double check that we aren't about to close stdin/stdout
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m_rx_busy_count = -1;
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if (m_conrd == STDIN_FILENO)
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m_conwr = -1;
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if (m_conwr == STDOUT_FILENO)
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m_conwr = -1;
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// Close any active connection
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if (m_conrd >= 0) close(m_conrd);
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if ((m_conwr >= 0)&&(m_conwr != m_conrd)) close(m_conwr);
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if (m_skt >= 0) close(m_skt);
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// Set the linux O_NONBLOCK on fdin
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m_conrd = m_conwr = m_skt = -1;
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fctl_flags = fcntl(fdin, F_GETFL, 0);
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fcntl(fdin, F_SETFL, fctl_flags | O_NONBLOCK);
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}
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}
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int UARTSIM::rx(unsigned char &data) {
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void UARTSIM::setup(unsigned isetup) {
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if (m_rx_busy_count >= 0) {
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if (isetup != m_setup) {
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if (m_rx_busy_count-- == 0) {
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m_setup = isetup;
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data = (unsigned char)m_rx_next;
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m_baud_counts = (isetup & 0x0ffffff);
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return 1;
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m_nbits = 8-((isetup >> 28)&0x03);
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m_nstop =((isetup >> 27)&1)+1;
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m_nparity = (isetup >> 26)&1;
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m_fixdp = (isetup >> 25)&1;
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m_evenp = (isetup >> 24)&1;
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}
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}
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}
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}
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if (read(m_fdin, &m_rx_next, 1) > 0)
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int UARTSIM::nettick(int i_tx) {
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m_rx_busy_count = m_baud_counts;
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int o_rx = 1;
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return 0;
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if ((m_conrd < 0)&&(m_conwr<0)&&(m_skt>=0)) {
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// Can we accept a connection?
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struct pollfd pb;
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pb.fd = m_skt;
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pb.events = POLLIN;
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poll(&pb, 1, 0);
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if (pb.revents & POLLIN) {
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m_conrd = accept(m_skt, 0, 0);
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m_conwr = m_conrd;
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if (m_conrd < 0)
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perror("Accept failed:");
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}
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}
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}
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int UARTSIM::tx(int stb, char data) {
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if ((!i_tx)&&(m_last_tx))
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if (m_tx_busy_count > 0) {
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m_rx_changectr = 0;
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else m_rx_changectr++;
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m_last_tx = i_tx;
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if (m_rx_state == RXIDLE) {
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if (!i_tx) {
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m_rx_state = RXDATA;
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m_rx_baudcounter =m_baud_counts+m_baud_counts/2-1;
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m_rx_baudcounter -= m_rx_changectr;
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m_rx_busy = 0;
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m_rx_data = 0;
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}
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} else if (m_rx_baudcounter <= 0) {
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if (m_rx_busy >= (1<<(m_nbits+m_nparity+m_nstop-1))) {
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m_rx_state = RXIDLE;
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if (m_conwr >= 0) {
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char buf[1];
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buf[0] = (m_rx_data >> (32-m_nbits-m_nstop-m_nparity))&0x0ff;
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if (1 != send(m_conwr, buf, 1, 0)) {
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close(m_conwr);
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m_conrd = m_conwr = -1;
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}
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}
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} else {
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m_rx_busy = (m_rx_busy << 1)|1;
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// Low order bit is transmitted first, in this
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// order:
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// Start bit (1'b1)
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// bit 0
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// bit 1
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// bit 2
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// ...
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// bit N-1
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// (possible parity bit)
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// stop bit
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// (possible secondary stop bit)
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m_rx_data = ((i_tx&1)<<31) | (m_rx_data>>1);
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} m_rx_baudcounter = m_baud_counts-1;
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} else
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m_rx_baudcounter--;
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if (m_tx_state == TXIDLE) {
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struct pollfd pb;
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pb.fd = m_conrd;
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pb.events = POLLIN;
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if (poll(&pb, 1, 0) < 0)
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perror("Polling error:");
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if (pb.revents & POLLIN) {
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char buf[1];
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if (1 == recv(m_conrd, buf, 1, MSG_DONTWAIT)) {
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m_tx_data = (-1<<(m_nbits+m_nparity+1))
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// << nstart_bits
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|((buf[0]<<1)&0x01fe);
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if (m_nparity) {
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int p;
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// If m_nparity is set, we need to then
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// create the parity bit.
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if (m_fixdp)
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p = m_evenp;
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else {
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p = (m_tx_data >> 1)&0x0ff;
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p = p ^ (p>>4);
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p = p ^ (p>>2);
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p = p ^ (p>>1);
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p &= 1;
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p ^= m_evenp;
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}
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m_tx_data |= (p<<(m_nbits+m_nparity));
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}
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m_tx_busy = (1<<(m_nbits+m_nparity+m_nstop+1))-1;
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m_tx_state = TXDATA;
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o_rx = 0;
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m_tx_baudcounter = m_baud_counts-1;
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}
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}
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} else if (m_tx_baudcounter <= 0) {
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m_tx_data >>= 1;
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m_tx_busy >>= 1;
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if (!m_tx_busy)
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m_tx_state = TXIDLE;
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else
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m_tx_baudcounter = m_baud_counts-1;
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o_rx = m_tx_data&1;
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} else {
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m_tx_baudcounter--;
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o_rx = m_tx_data&1;
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}
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// This write may block--if so, we don't care. Just write it.
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return o_rx;
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if (--m_tx_busy_count == 0)
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if (write(m_fdout, &m_tx_data, 1) != 1)
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perror("O/S Write Err:");
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return 1;
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} else if (stb) {
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m_tx_data = data;
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m_tx_busy_count = m_baud_counts;
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}
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}
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return 0;
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int UARTSIM::fdtick(int i_tx) {
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int o_rx = 1;
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if ((!i_tx)&&(m_last_tx))
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m_rx_changectr = 0;
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else m_rx_changectr++;
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m_last_tx = i_tx;
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if (m_rx_state == RXIDLE) {
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if (!i_tx) {
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m_rx_state = RXDATA;
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m_rx_baudcounter =m_baud_counts+m_baud_counts/2-1;
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m_rx_baudcounter -= m_rx_changectr;
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m_rx_busy = 0;
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m_rx_data = 0;
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}
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} else if (m_rx_baudcounter <= 0) {
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if (m_rx_busy >= (1<<(m_nbits+m_nparity+m_nstop-1))) {
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m_rx_state = RXIDLE;
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if (m_conwr >= 0) {
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char buf[1];
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buf[0] = (m_rx_data >> (32-m_nbits-m_nstop-m_nparity))&0x0ff;
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if (1 != write(m_conwr, buf, 1)) {
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fprintf(stderr, "ERR while attempting to write out--closing output port\n");
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perror("UARTSIM::write() ");
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m_conrd = m_conwr = -1;
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}
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}
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} else {
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m_rx_busy = (m_rx_busy << 1)|1;
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// Low order bit is transmitted first, in this
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// order:
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// Start bit (1'b1)
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// bit 0
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// bit 1
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// bit 2
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// ...
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// bit N-1
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// (possible parity bit)
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// stop bit
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// (possible secondary stop bit)
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m_rx_data = ((i_tx&1)<<31) | (m_rx_data>>1);
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} m_rx_baudcounter = m_baud_counts-1;
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} else
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m_rx_baudcounter--;
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if ((m_tx_state == TXIDLE)&&(m_conrd >= 0)) {
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struct pollfd pb;
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pb.fd = m_conrd;
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pb.events = POLLIN;
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if (poll(&pb, 1, 0) < 0)
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perror("Polling error:");
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if (pb.revents & POLLIN) {
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char buf[1];
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int nr;
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if (1==(nr = read(m_conrd, buf, 1))) {
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m_tx_data = (-1<<(m_nbits+m_nparity+1))
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// << nstart_bits
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|((buf[0]<<1)&0x01fe);
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if (m_nparity) {
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int p;
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// If m_nparity is set, we need to then
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// create the parity bit.
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if (m_fixdp)
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p = m_evenp;
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else {
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p = (m_tx_data >> 1)&0x0ff;
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p = p ^ (p>>4);
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p = p ^ (p>>2);
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p = p ^ (p>>1);
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p &= 1;
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p ^= m_evenp;
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}
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m_tx_data |= (p<<(m_nbits+m_nparity));
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}
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m_tx_busy = (1<<(m_nbits+m_nparity+m_nstop+1))-1;
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m_tx_state = TXDATA;
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o_rx = 0;
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m_tx_baudcounter = m_baud_counts-1;
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} else if (nr < 0) {
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fprintf(stderr, "ERR while attempting to read in--closing input port\n");
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perror("UARTSIM::read() ");
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m_conrd = -1;
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} // and we really don't care if nr == 0 except that
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// the poll above is supposed to keep it from happening
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}
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} else if (m_tx_baudcounter == 0) {
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m_tx_data >>= 1;
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m_tx_busy >>= 1;
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if (!m_tx_busy)
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m_tx_state = TXIDLE;
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else
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m_tx_baudcounter = m_baud_counts-1;
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o_rx = m_tx_data&1;
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} else {
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m_tx_baudcounter--;
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o_rx = m_tx_data&1;
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}
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}
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return o_rx;
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}
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No newline at end of file
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No newline at end of file
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