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Subversion Repositories s6soc

[/] [s6soc/] [trunk/] [bench/] [cpp/] [zip_sim.cpp] - Diff between revs 10 and 17

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Rev 10 Rev 17
Line 78... Line 78...
        UARTSIM         m_uart;
        UARTSIM         m_uart;
        GPIOSIM         m_gpio;
        GPIOSIM         m_gpio;
        KEYPADSIM       m_keypad;
        KEYPADSIM       m_keypad;
        unsigned        m_last_led;
        unsigned        m_last_led;
        time_t          m_start_time;
        time_t          m_start_time;
 
        FILE            *m_dbg;
 
 
        ZIPSIM_TB(void) : m_uart(0x2b6) {
        ZIPSIM_TB(void) : m_uart(0x2b6) {
                m_start_time = time(NULL);
                m_start_time = time(NULL);
 
                m_dbg = fopen("dbg.txt","w");
        }
        }
 
 
        void    reset(void) {
        void    reset(void) {
                m_flash.debug(false);
                m_flash.debug(false);
        }
        }
Line 125... Line 127...
                if (m_core->o_led != m_last_led) {
                if (m_core->o_led != m_last_led) {
                        printf("LED: %08x\n", m_core->o_led);
                        printf("LED: %08x\n", m_core->o_led);
                        m_last_led = m_core->o_led;
                        m_last_led = m_core->o_led;
                }
                }
 
 
                /*
 
                printf("PC: %08x:%08x [%08x:%08x:%08x:%08x:%08x],%08x,%08x,%d,%08x,%08x (%x,%x)\n",
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__ipc,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__upc,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[0],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[1],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[2],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[3],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[15],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction_decoder__DOT__r_I,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__r_opB,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction_decoder__DOT__w_dcdR_pc,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__r_opA,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__wr_reg_vl,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__w_iflags,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__w_iflags,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__pf_pc
 
                        );
 
                if (m_core->v__DOT__wb_cyc) {
 
                printf("WB: %s/%s/%s[@0x%08x] %08x ->%s/%s %08x\n",
 
                        (m_core->v__DOT__wb_cyc)?"CYC":"   ",
 
                        (m_core->v__DOT__wb_stb)?"STB":"   ",
 
                        (m_core->v__DOT__wb_we )?"WE ":"   ",
 
                        (m_core->v__DOT__w_zip_addr),
 
                        (m_core->v__DOT__wb_data),
 
                        (m_core->v__DOT__wb_ack)?"ACK":"   ",
 
                        (m_core->v__DOT__wb_stall)?"STL":"   ",
 
                        (m_core->v__DOT__wb_idata)
 
                        );
 
                }
 
 
 
                if (m_core->v__DOT__thecpu__DOT__thecpu__DOT__pf_valid)
 
                        printf("PC: %08x - %08x, uart=%d,%d, pic = %d,%04x,%0d,%04x\n",
 
                                m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction_pc,
 
                                m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction,
 
                                m_core->i_rx_stb, m_core->i_tx_busy,
 
                                m_core->v__DOT__pic__DOT__r_gie,
 
                                m_core->v__DOT__pic__DOT__r_int_enable,
 
                                m_core->v__DOT__pic__DOT__r_any,
 
                                m_core->v__DOT__pic__DOT__r_int_state);
 
                */
 
 
 
                printf("%08x\n", m_core->v__DOT__zipt_a__DOT__r_value);
                if (m_dbg) fprintf(m_dbg, "PC: %08x:%08x [%08x:%08x:%08x:%08x:%08x],%08x,%08x,%d,%08x,%08x (%x,%x/0x%08x)\n",
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__ipc,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__upc,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[0],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[1],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[2],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[3],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__regset[15],
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction_decoder__DOT__r_I,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__r_opB,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction_decoder__DOT__w_dcdR_pc,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__r_opA,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__wr_reg_vl,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__w_iflags,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__w_uflags,
 
                        m_core->v__DOT__thecpu__DOT__thecpu__DOT__pf_pc
 
                        );
 
                if ((m_core->v__DOT__wb_cyc)&&(m_dbg))
 
                fprintf(m_dbg, "WB: %s/%s/%s[@0x%08x] %08x ->%s/%s %08x\n",
 
                        (m_core->v__DOT__wb_cyc)?"CYC":"   ",
 
                        (m_core->v__DOT__wb_stb)?"STB":"   ",
 
                        (m_core->v__DOT__wb_we )?"WE ":"   ",
 
                        (m_core->v__DOT__w_zip_addr),
 
                        (m_core->v__DOT__wb_data),
 
                        (m_core->v__DOT__wb_ack)?"ACK":"   ",
 
                        (m_core->v__DOT__wb_stall)?"STL":"   ",
 
                        (m_core->v__DOT__wb_idata)
 
                        );
 
                if (m_dbg)
 
                        fprintf(m_dbg, "PIC: %3s(%4x) %3s(%4x)%s\n",
 
                                (m_core->v__DOT__pic__DOT__r_gie)?"GIE":"",
 
                                (m_core->v__DOT__pic__DOT__r_int_enable),
 
                                (m_core->v__DOT__pic__DOT__r_any)?"ANY":"",
 
                                (m_core->v__DOT__pic__DOT__r_int_state),
 
                                (m_core->v__DOT__pic__DOT__r_interrupt)?" ---> INT!":"");
 
 
 
                if ((m_core->v__DOT__thecpu__DOT__thecpu__DOT__pf_valid)&&(m_dbg))
 
                        fprintf(m_dbg, "PC: %08x - %08x, uart=%d,%d, pic = %d,%04x,%0d,%04x\n",
 
                                m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction_pc,
 
                                m_core->v__DOT__thecpu__DOT__thecpu__DOT__instruction,
 
                                m_core->i_rx_stb, m_core->i_tx_busy,
 
                                m_core->v__DOT__pic__DOT__r_gie,
 
                                m_core->v__DOT__pic__DOT__r_int_enable,
 
                                m_core->v__DOT__pic__DOT__r_any,
 
                                m_core->v__DOT__pic__DOT__r_int_state);
        }
        }
};
};
 
 
ZIPSIM_TB       *tb;
ZIPSIM_TB       *tb;
 
 

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