| Line 67... |
Line 67... |
NET "io_qspi_dat<1>" LOC="N11" | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<1>" LOC="N11" | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<2>" LOC="N10" | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<2>" LOC="N10" | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<3>" LOC="P10" | IOSTANDARD = LVCMOS33;
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NET "io_qspi_dat<3>" LOC="P10" | IOSTANDARD = LVCMOS33;
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#DEPP Signals
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#DEPP Signals
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# NET "DEPP_WAIT" LOC = "B6" | IOSTANDARD = LVCMOS33;
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NET "o_depp_wait" LOC = "B6" | IOSTANDARD = LVCMOS33;
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# NET "DEPP_ASTB" LOC = "A6" | IOSTANDARD = LVCMOS33;
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NET "i_depp_astb_n" LOC = "A6" | IOSTANDARD = LVCMOS33;
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# NET "DEPP_DSTB" LOC = "B7" | IOSTANDARD = LVCMOS33;
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NET "i_depp_dstb_n" LOC = "B7" | IOSTANDARD = LVCMOS33;
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# NET "DEPP_WRITE" LOC = "A7" | IOSTANDARD = LVCMOS33;
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NET "i_depp_write_n" LOC = "A7" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<0>" LOC = "B9" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<0>" LOC = "B9" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<1>" LOC = "A9" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<1>" LOC = "A9" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<2>" LOC = "B10" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<2>" LOC = "B10" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<3>" LOC = "A10" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<3>" LOC = "A10" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<4>" LOC = "B11" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<4>" LOC = "B11" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<5>" LOC = "A11" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<5>" LOC = "A11" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<6>" LOC = "B12" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<6>" LOC = "B12" | IOSTANDARD = LVCMOS33;
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# NET "DBUS<7>" LOC = "A12" | IOSTANDARD = LVCMOS33;
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NET "io_depp_data<7>" LOC = "A12" | IOSTANDARD = LVCMOS33;
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#IO PORTs
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#IO PORTs
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# UART: PIO26 (CTS), PIO27 (TXD), PIO28(RXD), PIO29(RTS)
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# UART: PIO26 (CTS), PIO27 (TXD), PIO28(RXD), PIO29(RTS)
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NET "i_uart" LOC = "A2" | IOSTANDARD = LVCMOS33;
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NET "i_uart" LOC = "A2" | IOSTANDARD = LVCMOS33;
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| Line 135... |
Line 135... |
NET "i_gpio<12>" LOC = "H2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<12>" LOC = "H2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<13>" LOC = "G1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<13>" LOC = "G1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<14>" LOC = "G2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<14>" LOC = "G2" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<15>" LOC = "J1" | IOSTANDARD = LVCMOS33;
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NET "i_gpio<15>" LOC = "J1" | IOSTANDARD = LVCMOS33;
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NET "o_kp_col<0>" LOC = "J2" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "o_kp_col<1>" LOC = "K1" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "o_kp_col<2>" LOC = "P7" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "o_kp_col<3>" LOC = "D13" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<0>" LOC = "E13" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<1>" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<2>" LOC = "P12" | IOSTANDARD = LVCMOS33 | PULLUP;
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NET "i_kp_row<3>" LOC = "N6" | IOSTANDARD = LVCMOS33 | PULLUP;
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# NET "PORTA<0>" LOC = "P5" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO01, i_uart
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# NET "PORTA<0>" LOC = "P5" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO01, i_uart
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# NET "PORTA<1>" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO02, o_uart
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# NET "PORTA<1>" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO02, o_uart
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# NET "PORTA<2>" LOC = "N6" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO03, io_scl
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# NET "PORTA<2>" LOC = "N6" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO03, io_scl
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# NET "PORTA<3>" LOC = "P7" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO04, io_sda
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# NET "PORTA<3>" LOC = "P7" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO04, io_sda
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# NET "PORTA<4>" LOC = "P12" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO05, o_pwm
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# NET "PORTA<4>" LOC = "P12" | IOSTANDARD = LVCMOS33 | PULLUP; # PIO05, o_pwm
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