| Line 47... |
Line 47... |
o_qspi_cs_n, o_qspi_sck, io_qspi_dat,
|
o_qspi_cs_n, o_qspi_sck, io_qspi_dat,
|
i_btn, o_led, o_pwm, o_pwm_shutdown_n, o_pwm_gain,
|
i_btn, o_led, o_pwm, o_pwm_shutdown_n, o_pwm_gain,
|
i_uart, o_uart, i_uart_cts, o_uart_rts,
|
i_uart, o_uart, i_uart_cts, o_uart_rts,
|
i_kp_row, o_kp_col,
|
i_kp_row, o_kp_col,
|
i_gpio, o_gpio,
|
i_gpio, o_gpio,
|
io_scl, io_sda);
|
io_scl, io_sda,
|
|
i_depp_astb_n, i_depp_dstb_n, i_depp_write_n, io_depp_data,
|
|
o_depp_wait
|
|
);
|
input i_clk_8mhz;
|
input i_clk_8mhz;
|
//
|
//
|
// Quad SPI Flash
|
// Quad SPI Flash
|
output wire o_qspi_cs_n;
|
output wire o_qspi_cs_n;
|
output wire o_qspi_sck;
|
output wire o_qspi_sck;
|
| Line 74... |
Line 77... |
// and our GPIO
|
// and our GPIO
|
input [15:2] i_gpio;
|
input [15:2] i_gpio;
|
output wire [15:2] o_gpio;
|
output wire [15:2] o_gpio;
|
// and our I2C port
|
// and our I2C port
|
inout io_scl, io_sda;
|
inout io_scl, io_sda;
|
|
// Finally, the DEPP interface ... if so enabled
|
|
input i_depp_astb_n, i_depp_dstb_n, i_depp_write_n;
|
|
inout [7:0] io_depp_data;
|
|
output wire o_depp_wait;
|
|
|
//
|
//
|
// Clock management
|
// Clock management
|
//
|
//
|
// Generate a usable clock for the rest of the board to run at.
|
// Generate a usable clock for the rest of the board to run at.
|
| Line 105... |
Line 112... |
.CLKFX(clk_s),
|
.CLKFX(clk_s),
|
.PSEN(1'b0),
|
.PSEN(1'b0),
|
.RST(1'b0));
|
.RST(1'b0));
|
|
|
//
|
//
|
// Generate active-high reset.
|
|
//
|
|
// Actually, we don't. Instead, let this board reset through
|
|
// the reconfiguration/power on process and we never use this
|
|
// wire.
|
|
//
|
|
/*
|
|
reg r_reset;
|
|
initial r_reset = 1'b1;
|
|
always @(posedge i_clk_12mhz)
|
|
r_reset <= 1'b0;
|
|
*/
|
|
assign reset_s = 1'b0;
|
|
|
|
|
|
//
|
|
// The UART serial interface
|
// The UART serial interface
|
//
|
//
|
// Perhaps this should be part of our simulation model as well.
|
// Perhaps this should be part of our simulation model as well.
|
// For historical reasons, internal to Gisselquist Technology,
|
// For historical reasons, internal to Gisselquist Technology,
|
// this has remained separate from the simulation, allowing the
|
// this has remained separate from the simulation, allowing the
|
| Line 135... |
Line 126... |
wire tx_busy;
|
wire tx_busy;
|
wire [29:0] uart_setup;
|
wire [29:0] uart_setup;
|
|
|
wire rx_break, rx_parity_err, rx_frame_err, rx_ck_uart, tx_break;
|
wire rx_break, rx_parity_err, rx_frame_err, rx_ck_uart, tx_break;
|
assign tx_break = 1'b0;
|
assign tx_break = 1'b0;
|
rxuart rcvuart(clk_s, reset_s, uart_setup,
|
rxuart rcvuart(clk_s, 1'b0, uart_setup,
|
i_uart, rx_stb, rx_data,
|
i_uart, rx_stb, rx_data,
|
rx_break, rx_parity_err, rx_frame_err, rx_ck_uart);
|
rx_break, rx_parity_err, rx_frame_err, rx_ck_uart);
|
txuart tcvuart(clk_s, reset_s, uart_setup, tx_break, tx_stb, tx_data,
|
txuart tcvuart(clk_s, reset_s, uart_setup, tx_break, tx_stb, tx_data,
|
o_uart, i_uart_cts, tx_busy);
|
o_uart, i_uart_cts, tx_busy);
|
|
|
| Line 157... |
Line 148... |
// offering no ZipCPU and access to reprogramming via the flash.
|
// offering no ZipCPU and access to reprogramming via the flash.
|
//
|
//
|
wire [3:0] qspi_dat;
|
wire [3:0] qspi_dat;
|
wire [1:0] qspi_bmod;
|
wire [1:0] qspi_bmod;
|
wire [15:0] w_gpio;
|
wire [15:0] w_gpio;
|
|
wire [7:0] w_depp_data;
|
|
|
|
`ifndef BYPASS_LOGIC
|
altbusmaster slavedbus(clk_s, reset_s,
|
altbusmaster slavedbus(clk_s, reset_s,
|
// External ... bus control (if enabled)
|
// External ... bus control (if enabled)
|
|
// DEPP I/O Control
|
|
i_depp_astb_n, i_depp_dstb_n, i_depp_write_n,
|
|
io_depp_data, w_depp_data, o_depp_wait,
|
|
// External UART interface
|
rx_stb, rx_data, tx_stb, tx_data, tx_busy, o_uart_rts,
|
rx_stb, rx_data, tx_stb, tx_data, tx_busy, o_uart_rts,
|
// SPI/SD-card flash
|
// SPI/SD-card flash
|
o_qspi_cs_n, o_qspi_sck, qspi_dat, io_qspi_dat, qspi_bmod,
|
o_qspi_cs_n, o_qspi_sck, qspi_dat, io_qspi_dat, qspi_bmod,
|
// Board lights and switches
|
// Board lights and switches
|
i_btn, o_led, o_pwm, { o_pwm_shutdown_n, o_pwm_gain },
|
i_btn, o_led, o_pwm, { o_pwm_shutdown_n, o_pwm_gain },
|
| Line 185... |
Line 182... |
// control wires (qspi_bmod) to set the output lines appropriately.
|
// control wires (qspi_bmod) to set the output lines appropriately.
|
//
|
//
|
assign io_qspi_dat = (~qspi_bmod[1])?({2'b11,1'bz,qspi_dat[0]})
|
assign io_qspi_dat = (~qspi_bmod[1])?({2'b11,1'bz,qspi_dat[0]})
|
:((qspi_bmod[0])?(4'bzzzz):(qspi_dat[3:0]));
|
:((qspi_bmod[0])?(4'bzzzz):(qspi_dat[3:0]));
|
|
|
|
`else
|
|
reg [26:0] r_counter;
|
|
always @(posedge clk_s)
|
|
r_counter <= r_counter+1;
|
|
assign o_led[0] = r_counter[26];
|
|
assign o_led[1] = r_counter[25];
|
|
assign o_led[2] = r_counter[24];
|
|
assign o_led[3] = r_counter[23];
|
|
// assign o_led[0] = 1'b1;
|
|
// assign o_led[1] = 1'b0;
|
|
// assign o_led[2] = 1'b1;
|
|
// assign o_led[3] = 1'b0;
|
|
|
|
assign w_gpio = 16'h3;
|
|
assign o_pwm = 1'b0;
|
|
assign o_pwm_shutdown_n = 1'b0;
|
|
assign o_pwm_gain = 1'b0;
|
|
|
|
assign o_depp_wait = (~i_depp_astb_n);
|
|
assign w_depp_data = 8'h00;
|
|
assign io_qspi_dat = 4'bzzzz;
|
|
assign o_qspi_cs_n = 1'b1;
|
|
assign o_qspi_sck = 1'b1;
|
|
|
|
assign uart_setup = 30'h080002b6;
|
|
|
|
assign o_uart_rts = 1'b1;
|
|
`endif
|
//
|
//
|
// I2C support
|
// I2C support
|
//
|
//
|
// Supporting I2C requires a couple quick adjustments to our
|
// Supporting I2C requires a couple quick adjustments to our
|
// GPIO lines. Specifically, we'll allow that when the output
|
// GPIO lines. Specifically, we'll allow that when the output
|
| Line 199... |
Line 224... |
//
|
//
|
assign io_sda = (w_gpio[0]) ? 1'bz : 1'b0;
|
assign io_sda = (w_gpio[0]) ? 1'bz : 1'b0;
|
assign io_scl = (w_gpio[1]) ? 1'bz : 1'b0;
|
assign io_scl = (w_gpio[1]) ? 1'bz : 1'b0;
|
assign o_gpio[15:2] = w_gpio[15:2];
|
assign o_gpio[15:2] = w_gpio[15:2];
|
|
|
|
//
|
|
// DEPP return data support
|
|
//
|
|
assign io_depp_data = (~i_depp_write_n)? 8'bzzzz_zzzz : w_depp_data;
|
|
|
endmodule
|
endmodule
|
|
|
No newline at end of file
|
No newline at end of file
|
