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[/] [s6soc/] [trunk/] [rtl/] [alttop.v] - Diff between revs 46 and 51

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Rev 46 Rev 51
Line 41... Line 41...
//
//
//
//
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
//
//
//
//
 
// `define      LOWLOGIC_FLASH
module alttop(i_clk_8mhz,
module alttop(i_clk_8mhz,
                o_qspi_cs_n, o_qspi_sck, io_qspi_dat,
                o_qspi_cs_n, o_qspi_sck, io_qspi_dat,
                i_btn, o_led, o_pwm, o_pwm_shutdown_n, o_pwm_gain,
                i_btn, o_led, o_pwm, o_pwm_shutdown_n, o_pwm_gain,
                        i_uart, o_uart, o_uart_rts_n, i_uart_cts_n,
                        i_uart, o_uart, o_uart_rts_n, i_uart_cts_n,
                i_kp_row, o_kp_col,
                i_kp_row, o_kp_col,
Line 87... Line 88...
        //
        //
        // Clock management
        // Clock management
        //
        //
        //      Generate a usable clock for the rest of the board to run at.
        //      Generate a usable clock for the rest of the board to run at.
        //
        //
        wire    ck_zero_0, clk_s;
        wire    ck_zero_0, clk_s, clk_sn;
 
 
        // Clock frequency = (20 / 2) * 8Mhz = 80 MHz
        // Clock frequency = (20 / 2) * 8Mhz = 80 MHz
        // Clock period = 12.5 ns
        // Clock period = 12.5 ns
        DCM_SP #(
        DCM_SP #(
                .CLKDV_DIVIDE(2.0),
                .CLKDV_DIVIDE(2.0),
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                .STARTUP_WAIT("TRUE")
                .STARTUP_WAIT("TRUE")
        ) u0(   .CLKIN(i_clk_8mhz),
        ) u0(   .CLKIN(i_clk_8mhz),
                .CLK0(ck_zero_0),
                .CLK0(ck_zero_0),
                .CLKFB(ck_zero_0),
                .CLKFB(ck_zero_0),
                .CLKFX(clk_s),
                .CLKFX(clk_s),
 
                .CLKFX180(clk_sn),
                .PSEN(1'b0),
                .PSEN(1'b0),
                .RST(1'b0));
                .RST(1'b0));
 
 
        //
        //
        // The UART serial interface
        // The UART serial interface
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        //      to be changed: either to add more devices, or to remove them.
        //      to be changed: either to add more devices, or to remove them.
        //
        //
        //      This is an alternate version of the busmaster interface,
        //      This is an alternate version of the busmaster interface,
        //      offering no ZipCPU and access to reprogramming via the flash.
        //      offering no ZipCPU and access to reprogramming via the flash.
        //
        //
 
`ifdef  LOWLOGIC_FLASH
 
        wire    [1:0]    qspi_sck;
 
`else
 
        wire            qspi_sck;
 
`endif
 
        wire            qspi_cs_n;
        wire    [3:0]    qspi_dat;
        wire    [3:0]    qspi_dat;
        wire    [1:0]    qspi_bmod;
        wire    [1:0]    qspi_bmod;
        wire    [15:0]   w_gpio;
        wire    [15:0]   w_gpio;
        wire    [7:0]    w_depp_data;
        wire    [7:0]    w_depp_data;
 
 
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                i_depp_astb_n, i_depp_dstb_n, i_depp_write_n,
                i_depp_astb_n, i_depp_dstb_n, i_depp_write_n,
                        io_depp_data, w_depp_data, o_depp_wait,
                        io_depp_data, w_depp_data, o_depp_wait,
                // External UART interface
                // External UART interface
                rx_stb, rx_data, tx_stb, tx_data, tx_busy, w_uart_rts_n,
                rx_stb, rx_data, tx_stb, tx_data, tx_busy, w_uart_rts_n,
                // SPI/SD-card flash
                // SPI/SD-card flash
                o_qspi_cs_n, o_qspi_sck, qspi_dat, io_qspi_dat, qspi_bmod,
                qspi_cs_n, qspi_sck, qspi_dat, io_qspi_dat, qspi_bmod,
                // Board lights and switches
                // Board lights and switches
                i_btn, o_led, o_pwm, { o_pwm_shutdown_n, o_pwm_gain },
                i_btn, o_led, o_pwm, { o_pwm_shutdown_n, o_pwm_gain },
                // Keypad connections
                // Keypad connections
                i_kp_row, o_kp_col,
                i_kp_row, o_kp_col,
                // UART control
                // UART control
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        //      wires are going at each instant, whether the device is in full
        //      wires are going at each instant, whether the device is in full
        //      Quad mode in, full quad mode out, or simply the normal SPI
        //      Quad mode in, full quad mode out, or simply the normal SPI
        //      port with one wire in and one wire out.  This utilizes our
        //      port with one wire in and one wire out.  This utilizes our
        //      control wires (qspi_bmod) to set the output lines appropriately.
        //      control wires (qspi_bmod) to set the output lines appropriately.
        //
        //
        assign io_qspi_dat = (~qspi_bmod[1])?({2'b11,1'bz,qspi_dat[0]})
        //
 
        //      2'b0?   -- Normal SPI
 
        //      2'b10   -- Quad Output
 
        //      2'b11   -- Quad Input
 
`ifdef  LOWLOGIC_FLASH
 
        reg             r_qspi_cs_n;
 
        reg     [1:0]    r_qspi_bmod;
 
        reg     [3:0]    r_qspi_dat, r_qspi_z;
 
        reg     [1:0]    r_qspi_sck;
 
        always @(posedge clk_s)
 
                r_qspi_sck <= qspi_sck;
 
        xoddr   xqspi_sck({clk_s, clk_sn}, r_qspi_sck, o_qspi_sck);
 
        initial r_qspi_cs_n = 1'b1;
 
        initial r_qspi_z = 4'b1101;
 
        always @(posedge clk_s)
 
        begin
 
                r_qspi_dat  <= (qspi_bmod[1]) ? qspi_dat:{ 3'b111, qspi_dat[0]};
 
                r_qspi_z    <= (!qspi_bmod[1])? 4'b1101
 
                                : ((qspi_bmod[0]) ? 4'h0 : 4'hf);
 
                r_qspi_cs_n <= qspi_cs_n;
 
        end
 
 
 
        assign  o_qspi_cs_n    = r_qspi_cs_n;
 
        assign  io_qspi_dat[0] = (r_qspi_z[0]) ? r_qspi_dat[0] : 1'bz;
 
        assign  io_qspi_dat[1] = (r_qspi_z[1]) ? r_qspi_dat[1] : 1'bz;
 
        assign  io_qspi_dat[2] = (r_qspi_z[2]) ? r_qspi_dat[2] : 1'bz;
 
        assign  io_qspi_dat[3] = (r_qspi_z[3]) ? r_qspi_dat[3] : 1'bz;
 
`else
 
        assign io_qspi_dat = (!qspi_bmod[1])?({2'b11,1'bz,qspi_dat[0]})
                                :((qspi_bmod[0])?(4'bzzzz):(qspi_dat[3:0]));
                                :((qspi_bmod[0])?(4'bzzzz):(qspi_dat[3:0]));
 
 
`else
        assign  o_qspi_cs_n = qspi_cs_n;
 
        assign  o_qspi_sck  = qspi_sck;
 
`endif  // LOWLOGIC_FLASH
 
 
 
`else   // BYPASS_LOGIC
        reg     [26:0]   r_counter;
        reg     [26:0]   r_counter;
        always @(posedge clk_s)
        always @(posedge clk_s)
                r_counter <= r_counter+1;
                r_counter <= r_counter+1;
        assign  o_led[0] = r_counter[26];
        assign  o_led[0] = r_counter[26];
        assign  o_led[1] = r_counter[25];
        assign  o_led[1] = r_counter[25];
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        assign  o_qspi_sck = 1'b1;
        assign  o_qspi_sck = 1'b1;
 
 
        assign  uart_setup = 30'h080002b6;
        assign  uart_setup = 30'h080002b6;
 
 
        assign  o_uart_rts_n = 1'b0;
        assign  o_uart_rts_n = 1'b0;
`endif
`endif  // BYPASS_LOGIC
        //
        //
        // I2C support
        // I2C support
        //
        //
        //      Supporting I2C requires a couple quick adjustments to our
        //      Supporting I2C requires a couple quick adjustments to our
        //      GPIO lines.  Specifically, we'll allow that when the output
        //      GPIO lines.  Specifically, we'll allow that when the output

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