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[/] [sdr_ctrl/] [trunk/] [rtl/] [core/] [sdrc_req_gen.v] - Diff between revs 15 and 16

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Rev 15 Rev 16
Line 128... Line 128...
   output [11:0]                 r2b_raddr;
   output [11:0]                 r2b_raddr;
   output [11:0]                 r2b_caddr;
   output [11:0]                 r2b_caddr;
   output [APP_RW-1:0]   r2b_len;
   output [APP_RW-1:0]   r2b_len;
   input                        b2r_ack, b2r_arb_ok, sdr_init_done;
   input                        b2r_ack, b2r_arb_ok, sdr_init_done;
//
//
   input                        sdr_width;
   input [1:0]                   sdr_width; // 2'b00 - 32 Bit, 2'b01 - 16 Bit, 2'b1x - 8Bit
 
 
 
 
   /****************************************************************************/
   /****************************************************************************/
   // Internal Nets
   // Internal Nets
 
 
   `define REQ_IDLE        1'b0
   `define REQ_IDLE        1'b0
Line 204... Line 205...
                   (req_ld) ? next_req_len : lcl_req_len;
                   (req_ld) ? next_req_len : lcl_req_len;
 
 
      curr_sdr_addr <= (req_ack) ? req_addr :
      curr_sdr_addr <= (req_ack) ? req_addr :
                       (req_ld) ? next_sdr_addr : curr_sdr_addr;
                       (req_ld) ? next_sdr_addr : curr_sdr_addr;
 
 
      sdr_addrs_mask <= (req_ack) ? (sdr_width ? {req_addr_mask,req_addr_mask[0]} : req_addr_mask) : sdr_addrs_mask;
      sdr_addrs_mask <= (req_ack) ?((sdr_width == 2'b00)  ? req_addr_mask :
 
                                    (sdr_width == 2'b01)  ? {req_addr_mask,req_addr_mask[0]} :
 
                                                            {req_addr_mask,req_addr_mask[1:0]}) : sdr_addrs_mask;
 
 
   end // always @ (posedge clk)
   end // always @ (posedge clk)
 
 
   always @ (*) begin
   always @ (*) begin
 
 

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