| Line 213... |
Line 213... |
b2x_prechg, d_rd_next, dt_next, xfr_end,
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b2x_prechg, d_rd_next, dt_next, xfr_end,
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rd_pipe_mt, ld_xfr, rd_last, d_rd_last,
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rd_pipe_mt, ld_xfr, rd_last, d_rd_last,
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wr_last, l_xfr_end, rd_start, d_rd_start,
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wr_last, l_xfr_end, rd_start, d_rd_start,
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wr_start, page_hit, burst_bdry, xfr_wrap,
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wr_start, page_hit, burst_bdry, xfr_wrap,
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b2x_prechg_hit;
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b2x_prechg_hit;
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reg [4:0] l_rd_next, l_rd_start, l_rd_last;
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reg [6:0] l_rd_next, l_rd_start, l_rd_last;
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assign b2x_read = (b2x_cmd == `OP_RD) ? 1'b1 : 1'b0;
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assign b2x_read = (b2x_cmd == `OP_RD) ? 1'b1 : 1'b0;
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assign b2x_write = (b2x_cmd == `OP_WR) ? 1'b1 : 1'b0;
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assign b2x_write = (b2x_cmd == `OP_WR) ? 1'b1 : 1'b0;
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| Line 248... |
Line 248... |
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//assign next_xfr_len = (l_xfr_end && !ld_xfr) ? l_len : xfr_len - 1;
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//assign next_xfr_len = (l_xfr_end && !ld_xfr) ? l_len : xfr_len - 1;
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assign next_xfr_len = (ld_xfr) ? b2x_len :
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assign next_xfr_len = (ld_xfr) ? b2x_len :
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(l_xfr_end) ? l_len: l_len - 1;
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(l_xfr_end) ? l_len: l_len - 1;
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assign d_rd_next = (cas_latency == 2'b01) ? l_rd_next[2] :
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assign d_rd_next = (cas_latency == 3'b001) ? l_rd_next[2] :
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(cas_latency == 2'b10) ? l_rd_next[3] :
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(cas_latency == 3'b010) ? l_rd_next[3] :
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l_rd_next[4];
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(cas_latency == 3'b011) ? l_rd_next[4] :
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(cas_latency == 3'b100) ? l_rd_next[5] :
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assign d_rd_last = (cas_latency == 2'b01) ? l_rd_last[2] :
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l_rd_next[6];
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(cas_latency == 2'b10) ? l_rd_last[3] :
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l_rd_last[4];
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assign d_rd_last = (cas_latency == 3'b001) ? l_rd_last[2] :
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(cas_latency == 3'b010) ? l_rd_last[3] :
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assign d_rd_start = (cas_latency == 2'b01) ? l_rd_start[2] :
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(cas_latency == 3'b011) ? l_rd_last[4] :
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(cas_latency == 2'b10) ? l_rd_start[3] :
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(cas_latency == 3'b100) ? l_rd_last[5] :
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l_rd_start[4];
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l_rd_last[6];
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assign rd_pipe_mt = (cas_latency == 2'b01) ? ~|l_rd_next[1:0] :
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assign d_rd_start = (cas_latency == 3'b001) ? l_rd_start[2] :
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(cas_latency == 2'b10) ? ~|l_rd_next[2:0] :
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(cas_latency == 3'b010) ? l_rd_start[3] :
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~|l_rd_next[3:0];
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(cas_latency == 3'b011) ? l_rd_start[4] :
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(cas_latency == 3'b100) ? l_rd_start[5] :
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l_rd_start[6];
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assign rd_pipe_mt = (cas_latency == 3'b001) ? ~|l_rd_next[1:0] :
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(cas_latency == 3'b010) ? ~|l_rd_next[2:0] :
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(cas_latency == 3'b011) ? ~|l_rd_next[3:0] :
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(cas_latency == 3'b100) ? ~|l_rd_next[4:0] :
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~|l_rd_next[5:0];
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assign dt_next = wr_next | d_rd_next;
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assign dt_next = wr_next | d_rd_next;
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assign xfr_end = ~|xfr_len;
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assign xfr_end = ~|xfr_len;
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| Line 299... |
Line 307... |
l_last <= 1'b0;
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l_last <= 1'b0;
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l_wrap <= 1'b0;
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l_wrap <= 1'b0;
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l_id <= 0;
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l_id <= 0;
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l_ba <= 0;
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l_ba <= 0;
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l_len <= 0;
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l_len <= 0;
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l_rd_next <= 5'b0;
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l_rd_next <= 7'b0;
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l_rd_start <= 5'b0;
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l_rd_start <= 7'b0;
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l_rd_last <= 5'b0;
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l_rd_last <= 7'b0;
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act_cmd <= 1'b0;
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act_cmd <= 1'b0;
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d_act_cmd <= 1'b0;
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d_act_cmd <= 1'b0;
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xfr_st <= `XFR_IDLE;
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xfr_st <= `XFR_IDLE;
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end // if (~reset_n)
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end // if (~reset_n)
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| Line 317... |
Line 325... |
l_last <= (ld_xfr) ? b2x_last : l_last;
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l_last <= (ld_xfr) ? b2x_last : l_last;
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l_wrap <= (ld_xfr) ? b2x_wrap : l_wrap;
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l_wrap <= (ld_xfr) ? b2x_wrap : l_wrap;
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l_id <= (ld_xfr) ? b2x_id : l_id;
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l_id <= (ld_xfr) ? b2x_id : l_id;
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l_ba <= (ld_xfr) ? b2x_ba : l_ba;
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l_ba <= (ld_xfr) ? b2x_ba : l_ba;
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l_len <= next_xfr_len;
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l_len <= next_xfr_len;
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l_rd_next <= {l_rd_next[3:0], rd_next};
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l_rd_next <= {l_rd_next[5:0], rd_next};
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l_rd_start <= {l_rd_start[3:0], rd_start};
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l_rd_start <= {l_rd_start[5:0], rd_start};
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l_rd_last <= {l_rd_last[3:0], rd_last};
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l_rd_last <= {l_rd_last[5:0], rd_last};
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act_cmd <= (xfr_cmd == `SDR_ACTIVATE) ? 1'b1 : 1'b0;
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act_cmd <= (xfr_cmd == `SDR_ACTIVATE) ? 1'b1 : 1'b0;
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d_act_cmd <= act_cmd;
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d_act_cmd <= act_cmd;
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xfr_st <= next_xfr_st;
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xfr_st <= next_xfr_st;
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end // else: !if(~reset_n)
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end // else: !if(~reset_n)
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