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Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [log/] [core_sdr32_sim.log] - Diff between revs 27 and 28

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Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [log/] [core_sdr32_sim.log] - Diff between revs 27 and 28

Rev 27	Rev 28
Line 44...	Line 44...
`# Loading work.sdrc_bank_ctl`	`# Loading work.sdrc_bank_ctl`
`# Loading work.sdrc_bank_fsm`	`# Loading work.sdrc_bank_fsm`
`# Loading work.sdrc_xfr_ctl`	`# Loading work.sdrc_xfr_ctl`
`# Loading work.sdrc_bs_convert`	`# Loading work.sdrc_bs_convert`
`# Loading work.mt48lc2m32b2`	`# Loading work.mt48lc2m32b2`
`# ** Warning: (vsim-3015) ../tb/tb_core.sv(193): [PCDPC] - Port size (11 or 11) does not match connection size (12) for port 'Addr'. The port definition is at: ../model/mt48lc2m32b2.v(42).`	`# ** Warning: (vsim-3015) ../tb/tb_core.sv(195): [PCDPC] - Port size (11 or 11) does not match connection size (12) for port 'Addr'. The port definition is at: ../model/mt48lc2m32b2.v(42).`
`# Region: /tb_core/u_sdram32`	`# Region: /tb_core/u_sdram32`
`# do run.do`	`# do run.do`
`# tb_core.u_sdram32 : at time 10157.0 ns AREF : Auto Refresh`	`# tb_core.u_sdram32 : at time 10157.0 ns AREF : Auto Refresh`
`# tb_core.u_sdram32 : at time 10247.0 ns AREF : Auto Refresh`	`# tb_core.u_sdram32 : at time 10247.0 ns AREF : Auto Refresh`
`# tb_core.u_sdram32 : at time 10337.0 ns AREF : Auto Refresh`	`# tb_core.u_sdram32 : at time 10337.0 ns AREF : Auto Refresh`
Line 598...	Line 598...
`# READ STATUS: Burst-No: 3 Addr: 03d2727d Rxd: 44556677`	`# READ STATUS: Burst-No: 3 Addr: 03d2727d Rxd: 44556677`
`# READ STATUS: Burst-No: 4 Addr: 03d2727f Rxd: 55667788`	`# READ STATUS: Burst-No: 4 Addr: 03d2727f Rxd: 55667788`
`###############################`	`###############################`
`# STATUS: SDRAM Write/Read TEST PASSED`	`# STATUS: SDRAM Write/Read TEST PASSED`
`###############################`	`###############################`
`# ** Note: $finish : ../tb/tb_core.sv(298)`	`# ** Note: $finish : ../tb/tb_core.sv(300)`
`# Time: 50860 ns Iteration: 0 Instance: /tb_core`	`# Time: 50860 ns Iteration: 0 Instance: /tb_core`
`### test 1: basic_test1 --> PASSED`	`### test 1: basic_test1 --> PASSED`
`###########################################`	`###########################################`

`###########################################`	`###########################################`