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[/] [sdr_ctrl/] [trunk/] [verif/] [log/] [core_sdr8_sim.log] - Diff between revs 56 and 65

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Rev 56 Rev 65
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 Compiling with MODELSIM in core SDR_8BIT Mode
 Compiling with MODELSIM in core SDR_8BIT Mode
 
** Note: (vlog-1901) OptionFile "C:/cygwin/home/Dinesh/projects/sdr_ctrl/sdr_ctrl/trunk/verif/run/vlog.opt" not found. Ignored.
Model Technology ModelSim ACTEL vlog 6.6d Compiler 2010.11 Nov  2 2010
Model Technology ModelSim ACTEL vlog 6.6d Compiler 2010.11 Nov  2 2010
-- Compiling module tb_core
-- Compiling module tb_core
-- Compiling module IS42VM16400K
-- Compiling module IS42VM16400K
-- Compiling module mt48lc2m32b2
-- Compiling module mt48lc2m32b2
-- Compiling module mt48lc8m8a2
-- Compiling module mt48lc8m8a2

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