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Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [log/] [top_sdr32_sim.log] - Diff between revs 28 and 37

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Subversion Repositories sdr_ctrl

[/] [sdr_ctrl/] [trunk/] [verif/] [log/] [top_sdr32_sim.log] - Diff between revs 28 and 37

Rev 28	Rev 37
Line 50...	Line 50...
`# Loading work.sdrc_bank_ctl`	`# Loading work.sdrc_bank_ctl`
`# Loading work.sdrc_bank_fsm`	`# Loading work.sdrc_bank_fsm`
`# Loading work.sdrc_xfr_ctl`	`# Loading work.sdrc_xfr_ctl`
`# Loading work.sdrc_bs_convert`	`# Loading work.sdrc_bs_convert`
`# Loading work.mt48lc2m32b2`	`# Loading work.mt48lc2m32b2`
`# ** Warning: (vsim-3015) ../tb/tb_top.sv(199): [PCDPC] - Port size (11 or 11) does not match connection size (12) for port 'Addr'. The port definition is at: ../model/mt48lc2m32b2.v(42).`	`# ** Warning: (vsim-3015) ../tb/tb_top.sv(182): [PCDPC] - Port size (11 or 11) does not match connection size (12) for port 'Addr'. The port definition is at: ../model/mt48lc2m32b2.v(42).`
`# Region: /tb_top/u_sdram32`	`# Region: /tb_top/u_sdram32`
`# do run.do`	`# do run.do`
`# tb_top.u_sdram32 : at time 10212.0 ns AREF : Auto Refresh`	`# tb_top.u_sdram32 : at time 10212.0 ns AREF : Auto Refresh`
`# tb_top.u_sdram32 : at time 10392.0 ns AREF : Auto Refresh`	`# tb_top.u_sdram32 : at time 10392.0 ns AREF : Auto Refresh`
`# tb_top.u_sdram32 : at time 10572.0 ns AREF : Auto Refresh`	`# tb_top.u_sdram32 : at time 10572.0 ns AREF : Auto Refresh`
Line 758...	Line 758...
`# tb_top.u_sdram32 : at time 61178.0 ns READ : Bank = 0 Row = 1319, Col = 161, Data = 55667788`	`# tb_top.u_sdram32 : at time 61178.0 ns READ : Bank = 0 Row = 1319, Col = 161, Data = 55667788`
`# READ STATUS: Burst-No: 4 Addr: 00f49ca1 Rxd: 55667788`	`# READ STATUS: Burst-No: 4 Addr: 00f49ca1 Rxd: 55667788`
`###############################`	`###############################`
`# STATUS: SDRAM Write/Read TEST PASSED`	`# STATUS: SDRAM Write/Read TEST PASSED`
`###############################`	`###############################`
`# ** Note: $finish : ../tb/tb_top.sv(304)`	`# ** Note: $finish : ../tb/tb_top.sv(283)`
`# Time: 71260 ns Iteration: 0 Instance: /tb_top`	`# Time: 71260 ns Iteration: 0 Instance: /tb_top`
`### test 1: basic_test1 --> PASSED`	`### test 1: basic_test1 --> PASSED`
`###########################################`	`###########################################`

`###########################################`	`###########################################`