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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: simple_spi_top.v,v 1.2 2003-01-07 13:29:52 rherveille Exp $
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// $Id: simple_spi_top.v,v 1.3 2003-01-09 16:47:59 rherveille Exp $
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//
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//
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// $Date: 2003-01-07 13:29:52 $
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// $Date: 2003-01-09 16:47:59 $
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// $Revision: 1.2 $
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// $Revision: 1.3 $
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// $Author: rherveille $
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// $Author: rherveille $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.2 2003/01/07 13:29:52 rherveille
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// Changed SPR bits coding.
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//
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// Revision 1.1.1.1 2002/12/22 16:07:15 rherveille
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// Revision 1.1.1.1 2002/12/22 16:07:15 rherveille
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// Initial release
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// Initial release
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//
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//
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//
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//
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.empty ( wfempty )
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.empty ( wfempty )
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);
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);
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//
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//
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// generate clk divider
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// generate clk divider
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reg [9:0] clkcnt;
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reg [10:0] clkcnt;
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always @(posedge clk_i)
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always @(posedge clk_i)
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if(~spe)
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if(~spe)
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clkcnt <= #1 10'h0;
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clkcnt <= #1 11'h0;
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else if (|clkcnt & state)
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else if (|clkcnt & state)
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clkcnt <= #1 clkcnt - 10'h1;
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clkcnt <= #1 clkcnt - 11'h1;
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else
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else
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case (espr) // synopsys full_case parallel_case
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case (espr) // synopsys full_case parallel_case
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4'b0000: clkcnt <= #1 10'h0; // 2 -- original M68HC11 coding
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4'b0000: clkcnt <= #1 11'h0; // 2 -- original M68HC11 coding
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4'b0001: clkcnt <= #1 10'h1; // 4 -- original M68HC11 coding
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4'b0001: clkcnt <= #1 11'h1; // 4 -- original M68HC11 coding
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4'b0010: clkcnt <= #1 10'h7; // 16 -- original M68HC11 coding
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4'b0010: clkcnt <= #1 11'h7; // 16 -- original M68HC11 coding
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4'b0011: clkcnt <= #1 10'hf; // 32 -- original M68HC11 coding
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4'b0011: clkcnt <= #1 11'hf; // 32 -- original M68HC11 coding
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4'b0100: clkcnt <= #1 10'h3; // 8
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4'b0100: clkcnt <= #1 11'h3; // 8
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4'b0101: clkcnt <= #1 10'h1f; // 64
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4'b0101: clkcnt <= #1 11'h1f; // 64
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4'b0110: clkcnt <= #1 10'h3f; // 128
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4'b0110: clkcnt <= #1 11'h3f; // 128
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4'b0111: clkcnt <= #1 10'h7f; // 256
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4'b0111: clkcnt <= #1 11'h7f; // 256
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4'b1000: clkcnt <= #1 10'hff; // 512
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4'b1000: clkcnt <= #1 11'hff; // 512
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4'b1001: clkcnt <= #1 10'h1ff; // 1024
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4'b1001: clkcnt <= #1 11'h1ff; // 1024
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4'b1010: clkcnt <= #1 10'h3ff; // 2048
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4'b1010: clkcnt <= #1 11'h3ff; // 2048
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4'b1011: clkcnt <= #1 10'h7ff; // 4096
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4'b1011: clkcnt <= #1 11'h7ff; // 4096
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endcase
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endcase
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// generate internal SCK
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// generate internal SCK
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reg sck;
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reg sck;
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always @(posedge clk_i)
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always @(posedge clk_i)
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