//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// SMII ////
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//// SMII ////
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//// ////
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//// ////
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//// Description ////
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//// Description ////
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//// SMII low pin count ethernet PHY interface ////
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//// SMII low pin count ethernet PHY interface ////
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//// ////
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//// ////
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//// To Do: ////
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//// To Do: ////
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//// - ////
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//// - ////
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//// ////
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//// ////
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//// Author(s): ////
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//// Author(s): ////
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//// - Michael Unneback, unneback@opencores.org ////
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//// - Michael Unneback, unneback@opencores.org ////
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//// michael.unneback@orsoc.se ////
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//// michael.unneback@orsoc.se ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2009 Authors and OPENCORES.ORG ////
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//// Copyright (C) 2009 Authors and OPENCORES.ORG ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer. ////
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//// the original copyright notice and the associated disclaimer. ////
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//// ////
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//// ////
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//// This source file is free software; you can redistribute it ////
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//// This source file is free software; you can redistribute it ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// and/or modify it under the terms of the GNU Lesser General ////
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//// Public License as published by the Free Software Foundation; ////
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//// Public License as published by the Free Software Foundation; ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// either version 2.1 of the License, or (at your option) any ////
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//// later version. ////
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//// later version. ////
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//// ////
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//// ////
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//// This source is distributed in the hope that it will be ////
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//// This source is distributed in the hope that it will be ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// PURPOSE. See the GNU Lesser General Public License for more ////
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//// details. ////
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//// details. ////
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//// ////
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//// ////
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//// You should have received a copy of the GNU Lesser General ////
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//// You should have received a copy of the GNU Lesser General ////
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//// Public License along with this source; if not, download it ////
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//// Public License along with this source; if not, download it ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// from http://www.opencores.org/lgpl.shtml ////
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//// ////
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//// ////
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//////////////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////////////
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// wire declarations
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// wire declarations
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`for (i=1;i<=SMII;i++)
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`for (i=1;i<=SMII;i++)
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// MII
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// MII
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wire m::`i::tx_clk;
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wire m::`i::tx_clk;
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wire [3:0] m::`i::txd;
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wire [3:0] m::`i::txd;
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wire m::`i::txen;
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wire m::`i::txen;
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wire m::`i::txerr;
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wire m::`i::txerr;
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wire m::`i::rx_clk;
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wire m::`i::rx_clk;
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wire [3:0] m::`i::rxd;
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wire [3:0] m::`i::rxd;
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wire m::`i::rxdv;
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wire m::`i::rxdv;
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wire m::`i::rxerr;
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wire m::`i::rxerr;
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wire m::`i::coll;
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wire m::`i::coll;
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wire m::`i::crs;
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wire m::`i::crs;
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`endfor
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`endfor
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wire [1:10] state;
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wire [1:10] state;
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wire sync;
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wire sync;
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wire [1:`SMII] rx, tx;
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wire [1:`SMII] rx, tx;
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wire [1:`SMII] mdc_o, md_i, md_o, md_oe;
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wire [1:`SMII] mdc_o, md_i, md_o, md_oe;
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smii_sync smii_sync1
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smii_sync smii_sync1
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(
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(
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.sync(sync),
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.sync(sync),
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.state(state),
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.state(state),
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.clk(eth_clk),
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.clk(eth_clk),
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.rst(wb_rst)
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.rst(wb_rst)
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);
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);
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`ifndef SMII_SYNC_PER_PHY
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`ifndef SMII_SYNC_PER_PHY
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obufdff obufdff_sync::`i
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obufdff obufdff_sync
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(
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(
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.d(sync),
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.d(sync),
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.pad(sync_pad_o[`i]),
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.pad(eth_sync_pad_o),
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.clk(eth_clk),
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.clk(eth_clk),
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.rst(wb_rst)
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.rst(wb_rst)
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);
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);
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`endif
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`endif
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`for (i=1;i<=SMII;i++)
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`for (i=1;i<=SMII;i++)
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// ethernet MAC
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// ethernet MAC
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eth_top eth_top::`i
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eth_top eth_top::`i
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(
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(
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// wb common
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// wb common
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.wb_clk_i(wb_clk),
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.wb_clk_i(wb_clk),
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.wb_rst_i(wb_rst),
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.wb_rst_i(wb_rst),
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// wb slave
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// wb slave
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.wb_dat_i(wbs_eth::`i::_cfg_dat_i),
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.wb_dat_i(wbs_eth::`i::_cfg_dat_i),
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.wb_dat_o(wbs_eth::`i::_cfg_dat_o),
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.wb_dat_o(wbs_eth::`i::_cfg_dat_o),
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.wb_adr_i(wbs_eth::`i::_cfg_adr_i[11:2]),
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.wb_adr_i(wbs_eth::`i::_cfg_adr_i[11:2]),
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.wb_sel_i(wbs_eth::`i::_cfg_sel_i),
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.wb_sel_i(wbs_eth::`i::_cfg_sel_i),
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.wb_we_i(wbs_eth::`i::_cfg_we_i),
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.wb_we_i(wbs_eth::`i::_cfg_we_i),
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.wb_cyc_i(wbs_eth::`i::_cfg_cyc_i),
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.wb_cyc_i(wbs_eth::`i::_cfg_cyc_i),
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.wb_stb_i(wbs_eth::`i::_cfg_stb_i),
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.wb_stb_i(wbs_eth::`i::_cfg_stb_i),
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.wb_ack_o(wbs_eth::`i::_cfg_ack_o),
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.wb_ack_o(wbs_eth::`i::_cfg_ack_o),
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.wb_err_o(wbs_eth::`i::_cfg_err_o),
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.wb_err_o(wbs_eth::`i::_cfg_err_o),
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// wb master
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// wb master
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.m_wb_adr_o(wbm_eth::`i::_adr_o),
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.m_wb_adr_o(wbm_eth::`i::_adr_o),
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.m_wb_sel_o(wbm_eth::`i::_sel_o),
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.m_wb_sel_o(wbm_eth::`i::_sel_o),
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.m_wb_we_o(wbm_eth::`i::_we_o),
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.m_wb_we_o(wbm_eth::`i::_we_o),
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.m_wb_dat_o(wbm_eth::`i::_dat_o),
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.m_wb_dat_o(wbm_eth::`i::_dat_o),
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.m_wb_dat_i(wbm_eth::`i::_dat_i),
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.m_wb_dat_i(wbm_eth::`i::_dat_i),
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.m_wb_cyc_o(wbm_eth::`i::_cyc_o),
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.m_wb_cyc_o(wbm_eth::`i::_cyc_o),
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.m_wb_stb_o(wbm_eth::`i::_stb_o),
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.m_wb_stb_o(wbm_eth::`i::_stb_o),
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.m_wb_ack_i(wbm_eth::`i::_ack_i),
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.m_wb_ack_i(wbm_eth::`i::_ack_i),
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.m_wb_err_i(wbm_eth::`i::_err_i),
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.m_wb_err_i(wbm_eth::`i::_err_i),
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.m_wb_cti_o(wbm_eth::`i::_cti_o),
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.m_wb_cti_o(wbm_eth::`i::_cti_o),
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.m_wb_bte_o(wbm_eth::`i::_bte_o),
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.m_wb_bte_o(wbm_eth::`i::_bte_o),
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// MII TX
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// MII TX
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.mtx_clk_pad_i(m::`i::tx_clk),
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.mtx_clk_pad_i(m::`i::tx_clk),
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.mtxd_pad_o(m::`i::txd),
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.mtxd_pad_o(m::`i::txd),
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.mtxen_pad_o(m::`i::txen),
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.mtxen_pad_o(m::`i::txen),
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.mtxerr_pad_o(m::`i::txerr),
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.mtxerr_pad_o(m::`i::txerr),
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.mrx_clk_pad_i(m::`i::rx_clk),
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.mrx_clk_pad_i(m::`i::rx_clk),
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.mrxd_pad_i(m::`i::rxd),
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.mrxd_pad_i(m::`i::rxd),
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.mrxdv_pad_i(m::`i::rxdv),
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.mrxdv_pad_i(m::`i::rxdv),
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.mrxerr_pad_i(m::`i::rxerr),
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.mrxerr_pad_i(m::`i::rxerr),
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.mcoll_pad_i(m::`i::coll),
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.mcoll_pad_i(m::`i::coll),
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.mcrs_pad_i(m::`i::crs),
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.mcrs_pad_i(m::`i::crs),
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// MII management
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// MII management
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.mdc_pad_o(mdc_o[`i]),
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.mdc_pad_o(mdc_o[`i]),
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.md_pad_i(md_i[`i]),
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.md_pad_i(md_i[`i]),
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.md_pad_o(md_o[`i]),
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.md_pad_o(md_o[`i]),
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.md_padoe_o(md_oe[`i]),
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.md_padoe_o(md_oe[`i]),
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.int_o(eth_int[`i])
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.int_o(eth_int[`i])
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);
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);
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iobuftri iobuftri::`i
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iobuftri iobuftri::`i
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(
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(
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.i(md_o[`i]),
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.i(md_o[`i]),
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.oe(md_oe[`i]),
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.oe(md_oe[`i]),
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.o(md_i[`i]),
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.o(md_i[`i]),
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.pad(eth_md_pad_io[`i])
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.pad(eth_md_pad_io[`i])
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);
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);
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obuf obuf::`i
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obuf obuf::`i
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(
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(
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.i(mdc_o[`i]),
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.i(mdc_o[`i]),
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.pad(eth_mdc_pad_o[`i])
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.pad(eth_mdc_pad_o[`i])
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);
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);
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smii_txrx smii_txrx::`i
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smii_txrx smii_txrx::`i
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(
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(
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.tx(tx[`i]),
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.tx(tx[`i]),
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.rx(rx[`i]),
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.rx(rx[`i]),
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.mtx_clk(m::`i::tx_clk),
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.mtx_clk(m::`i::tx_clk),
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.mtxd(m::`i::txd),
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.mtxd(m::`i::txd),
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.mtxen(m::`i::txen),
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.mtxen(m::`i::txen),
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.mtxerr(m::`i::txerr),
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.mtxerr(m::`i::txerr),
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.mrx_clk(m::`i::rx_clk),
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.mrx_clk(m::`i::rx_clk),
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.mrxd(m::`i::rxd),
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.mrxd(m::`i::rxd),
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.mrxdv(m::`i::rxdv),
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.mrxdv(m::`i::rxdv),
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.mrxerr(m::`i::rxerr),
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.mrxerr(m::`i::rxerr),
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.mcoll(m::`i::coll),
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.mcoll(m::`i::coll),
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.mcrs(m::`i::crs),
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.mcrs(m::`i::crs),
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.state(state),
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.state(state),
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.clk(eth_clk),
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.clk(eth_clk),
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.rst(wb_rst)
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.rst(wb_rst)
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);
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);
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`ifdef SMII_SYNC_PER_PHY
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`ifdef SMII_SYNC_PER_PHY
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obufdff obufdff_sync::`i
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obufdff obufdff_sync::`i
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(
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(
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.d(sync),
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.d(sync),
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.pad(eth_sync_pad_o[`i]),
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.pad(eth_sync_pad_o[`i]),
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.clk(eth_clk),
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.clk(eth_clk),
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.rst(wb_rst)
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.rst(wb_rst)
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);
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);
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`endif
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`endif
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obufdff obufdff_tx::`i
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obufdff obufdff_tx::`i
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(
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(
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.d(tx[`i]),
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.d(tx[`i]),
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.pad(eth_tx_pad_o[`i]),
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.pad(eth_tx_pad_o[`i]),
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.clk(eth_clk),
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.clk(eth_clk),
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.rst(wb_rst)
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.rst(wb_rst)
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);
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);
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ibufdff ibufdff_rx::`i
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ibufdff ibufdff_rx::`i
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(
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(
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.pad(eth_rx_pad_i[`i]),
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.pad(eth_rx_pad_i[`i]),
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.q(rx[`i]),
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.q(rx[`i]),
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.clk(eth_clk),
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.clk(eth_clk),
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.rst(wb_rst)
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.rst(wb_rst)
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);
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);
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`endfor
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`endfor
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