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https://opencores.org/ocsvn/spacewire_light/spacewire_light/trunk
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NET "clkm" TNM_NET = "clkm";
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NET "clkm" TNM_NET = "clkm";
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# Timing constraints between 200 MHz SpaceWire clock and system clock.
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# Timing constraints between 200 MHz SpaceWire clock and system clock.
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NET "spw_clkl" TNM_NET = "spwclk";
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NET "spw_clkl" TNM_NET = "spwclk";
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TIMESPEC "TS_spwclk_to_clkm" = FROM "spwclk" TO "clkm" 3 ns DATAPATHONLY;
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TIMESPEC "TS_spwclk_to_clkm" = FROM "spwclk" TO "clkm" 4 ns DATAPATHONLY;
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TIMESPEC "TS_clkm_to_spwclk" = FROM "clkm" TO "spwclk" 3 ns DATAPATHONLY;
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TIMESPEC "TS_clkm_to_spwclk" = FROM "clkm" TO "spwclk" 4 ns DATAPATHONLY;
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NET "clkm" MAXSKEW = 1 ns;
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TIMESPEC "TS_sync" = FROM FFS("*/syncdff_ff1") TO FFS("*/syncdff_ff2") 2 ns;
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NET "spw_clkl" MAXSKEW = 1 ns;
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## Input to DCM for 200 MHz SpaceWire clock can not be optimally routed.
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## Input to DCM for 200 MHz SpaceWire clock can not be optimally routed.
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PIN "spwclk0.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;
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PIN "spwclk0.CLKIN" CLOCK_DEDICATED_ROUTE = FALSE;
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##################################################################
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##################################################################
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