OpenCores
URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

Subversion Repositories spacewiresystemc

[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [.qsys_edit/] [ulight_fifo_schematic.nlv] - Diff between revs 32 and 40

Show entire file | Details | Blame | View Log

Rev 32 Rev 40
Line 74... Line 74...
preplace inst ulight_fifo.hps_0.i2c3 -pg 1
preplace inst ulight_fifo.hps_0.i2c3 -pg 1
preplace inst ulight_fifo.hps_0.gpio1 -pg 1
preplace inst ulight_fifo.hps_0.gpio1 -pg 1
preplace inst ulight_fifo.link_disable -pg 1 -lvl 3 -y 1330
preplace inst ulight_fifo.link_disable -pg 1 -lvl 3 -y 1330
preplace inst ulight_fifo.data_info -pg 1 -lvl 3 -y 630
preplace inst ulight_fifo.data_info -pg 1 -lvl 3 -y 630
preplace inst ulight_fifo.hps_0.gpio2 -pg 1
preplace inst ulight_fifo.hps_0.gpio2 -pg 1
preplace netloc EXPORTulight_fifo(SLAVE)clock_sel.external_connection,(SLAVE)ulight_fifo.clock_sel_external_connection) 1 0 3 NJ 100 NJ 100 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.clock_sel_external_connection,(SLAVE)clock_sel.external_connection) 1 0 3 NJ 200 NJ 220 NJ
preplace netloc FAN_OUTulight_fifo(SLAVE)clock_sel.clk,(SLAVE)auto_start.clk,(SLAVE)pll_0.refclk,(SLAVE)timecode_ready_rx.clk,(MASTER)clk_0.clk,(SLAVE)link_disable.clk,(SLAVE)data_flag_rx.clk,(SLAVE)hps_0.h2f_axi_clock,(SLAVE)data_read_en_rx.clk,(SLAVE)link_start.clk,(SLAVE)timecode_rx.clk,(SLAVE)fifo_empty_rx_status.clk,(SLAVE)timecode_tx_data.clk,(SLAVE)timecode_tx_enable.clk,(SLAVE)led_pio_test.clk,(SLAVE)fifo_empty_tx_status.clk,(SLAVE)data_info.clk,(SLAVE)fifo_full_tx_status.clk,(SLAVE)counter_rx_fifo.clk,(SLAVE)timecode_tx_ready.clk,(SLAVE)write_en_tx.clk,(SLAVE)fsm_info.clk,(SLAVE)counter_tx_fifo.clk,(SLAVE)pll_0.refclk1,(SLAVE)write_data_fifo_tx.clk,(SLAVE)fifo_full_rx_status.clk) 1 1 2 410 240 760
preplace netloc EXPORTulight_fifo(SLAVE)timecode_ready_rx.external_connection,(SLAVE)ulight_fifo.timecode_ready_rx_external_connection) 1 0 3 NJ 1560 NJ 1560 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.timecode_ready_rx_external_connection,(SLAVE)timecode_ready_rx.external_connection) 1 0 3 NJ 1560 NJ 1560 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.link_disable_external_connection,(SLAVE)link_disable.external_connection) 1 0 3 NJ 1360 NJ 1360 NJ
preplace netloc EXPORTulight_fifo(SLAVE)data_info.external_connection,(SLAVE)ulight_fifo.data_info_external_connection) 1 0 3 NJ 660 NJ 660 NJ
preplace netloc EXPORTulight_fifo(SLAVE)data_info.external_connection,(SLAVE)ulight_fifo.data_info_external_connection) 1 0 3 NJ 660 NJ 660 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.timecode_tx_ready_external_connection,(SLAVE)timecode_tx_ready.external_connection) 1 0 3 NJ 1960 NJ 1960 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.counter_rx_fifo_external_connection,(SLAVE)counter_rx_fifo.external_connection) 1 0 3 NJ 60 NJ 60 NJ
preplace netloc EXPORTulight_fifo(SLAVE)timecode_tx_enable.external_connection,(SLAVE)ulight_fifo.timecode_tx_enable_external_connection) 1 0 3 NJ 1860 NJ 1860 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)link_disable.external_connection,(SLAVE)ulight_fifo.link_disable_external_connection) 1 0 3 NJ 1360 NJ 1360 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.led_pio_test_external_connection,(SLAVE)led_pio_test.external_connection) 1 0 3 NJ 360 NJ 360 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.fsm_info_external_connection,(SLAVE)fsm_info.external_connection) 1 0 3 NJ 1260 NJ 1260 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.fsm_info_external_connection,(SLAVE)fsm_info.external_connection) 1 0 3 NJ 1260 NJ 1260 NJ
preplace netloc EXPORTulight_fifo(SLAVE)fifo_full_tx_status.external_connection,(SLAVE)ulight_fifo.fifo_full_tx_status_external_connection) 1 0 3 NJ 1160 NJ 1160 NJ
preplace netloc EXPORTulight_fifo(SLAVE)fifo_full_tx_status.external_connection,(SLAVE)ulight_fifo.fifo_full_tx_status_external_connection) 1 0 3 NJ 1160 NJ 1160 NJ
preplace netloc EXPORTulight_fifo(SLAVE)fifo_empty_rx_status.external_connection,(SLAVE)ulight_fifo.fifo_empty_rx_status_external_connection) 1 0 3 NJ 860 NJ 860 NJ
preplace netloc EXPORTulight_fifo(SLAVE)fifo_empty_rx_status.external_connection,(SLAVE)ulight_fifo.fifo_empty_rx_status_external_connection) 1 0 3 NJ 860 NJ 860 NJ
preplace netloc EXPORTulight_fifo(SLAVE)counter_tx_fifo.external_connection,(SLAVE)ulight_fifo.counter_tx_fifo_external_connection) 1 0 3 NJ 220 NJ 260 NJ
preplace netloc EXPORTulight_fifo(SLAVE)counter_tx_fifo.external_connection,(SLAVE)ulight_fifo.counter_tx_fifo_external_connection) 1 0 3 NJ 220 NJ 260 NJ
preplace netloc EXPORTulight_fifo(SLAVE)timecode_tx_data.external_connection,(SLAVE)ulight_fifo.timecode_tx_data_external_connection) 1 0 3 NJ 1760 NJ 1760 NJ
preplace netloc EXPORTulight_fifo(SLAVE)timecode_tx_data.external_connection,(SLAVE)ulight_fifo.timecode_tx_data_external_connection) 1 0 3 NJ 1760 NJ 1760 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.link_start_external_connection,(SLAVE)link_start.external_connection) 1 0 3 NJ 1460 NJ 1460 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)data_flag_rx.external_connection,(SLAVE)ulight_fifo.data_flag_rx_external_connection) 1 0 3 NJ 560 NJ 560 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.clk,(SLAVE)clk_0.clk_in) 1 0 1 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.clk,(SLAVE)clk_0.clk_in) 1 0 1 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.auto_start_external_connection,(SLAVE)auto_start.external_connection) 1 0 3 NJ 2260 NJ 2260 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)clk_0.clk_in_reset,(SLAVE)ulight_fifo.reset) 1 0 1 NJ
preplace netloc EXPORTulight_fifo(SLAVE)clk_0.clk_in_reset,(SLAVE)ulight_fifo.reset) 1 0 1 NJ
 
preplace netloc EXPORTulight_fifo(MASTER)ulight_fifo.pll_0_outclk0,(MASTER)pll_0.outclk0) 1 3 1 NJ
preplace netloc EXPORTulight_fifo(SLAVE)hps_0.memory,(SLAVE)ulight_fifo.memory) 1 0 2 NJ 170 NJ
preplace netloc EXPORTulight_fifo(SLAVE)hps_0.memory,(SLAVE)ulight_fifo.memory) 1 0 2 NJ 170 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.data_flag_rx_external_connection,(SLAVE)data_flag_rx.external_connection) 1 0 3 NJ 560 NJ 560 NJ
preplace netloc EXPORTulight_fifo(SLAVE)led_pio_test.external_connection,(SLAVE)ulight_fifo.led_pio_test_external_connection) 1 0 3 NJ 360 NJ 360 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)write_en_tx.external_connection,(SLAVE)ulight_fifo.write_en_tx_external_connection) 1 0 3 NJ 2160 NJ 2160 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)timecode_tx_ready.external_connection,(SLAVE)ulight_fifo.timecode_tx_ready_external_connection) 1 0 3 NJ 1960 NJ 1960 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.pll_0_locked,(SLAVE)pll_0.locked) 1 0 3 NJ 440 NJ 440 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.fifo_empty_tx_status_external_connection,(SLAVE)fifo_empty_tx_status.external_connection) 1 0 3 NJ 960 NJ 960 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.fifo_empty_tx_status_external_connection,(SLAVE)fifo_empty_tx_status.external_connection) 1 0 3 NJ 960 NJ 960 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.timecode_tx_enable_external_connection,(SLAVE)timecode_tx_enable.external_connection) 1 0 3 NJ 1860 NJ 1860 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.timecode_rx_external_connection,(SLAVE)timecode_rx.external_connection) 1 0 3 NJ 1660 NJ 1660 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.timecode_rx_external_connection,(SLAVE)timecode_rx.external_connection) 1 0 3 NJ 1660 NJ 1660 NJ
preplace netloc EXPORTulight_fifo(SLAVE)fifo_full_rx_status.external_connection,(SLAVE)ulight_fifo.fifo_full_rx_status_external_connection) 1 0 3 NJ 1060 NJ 1060 NJ
preplace netloc EXPORTulight_fifo(SLAVE)fifo_full_rx_status.external_connection,(SLAVE)ulight_fifo.fifo_full_rx_status_external_connection) 1 0 3 NJ 1060 NJ 1060 NJ
preplace netloc EXPORTulight_fifo(SLAVE)data_read_en_rx.external_connection,(SLAVE)ulight_fifo.data_read_en_rx_external_connection) 1 0 3 NJ 760 NJ 760 NJ
preplace netloc EXPORTulight_fifo(SLAVE)data_read_en_rx.external_connection,(SLAVE)ulight_fifo.data_read_en_rx_external_connection) 1 0 3 NJ 760 NJ 760 NJ
preplace netloc EXPORTulight_fifo(MASTER)pll_0.outclk0,(MASTER)ulight_fifo.pll_0_outclk0) 1 3 1 N
preplace netloc FAN_OUTulight_fifo(SLAVE)data_flag_rx.reset,(SLAVE)timecode_tx_enable.reset,(SLAVE)fifo_full_rx_status.reset,(SLAVE)timecode_tx_data.reset,(SLAVE)clock_sel.reset,(SLAVE)link_disable.reset,(SLAVE)counter_tx_fifo.reset,(SLAVE)link_start.reset,(SLAVE)data_info.reset,(SLAVE)fifo_full_tx_status.reset,(SLAVE)data_read_en_rx.reset,(SLAVE)fifo_empty_rx_status.reset,(MASTER)clk_0.clk_reset,(SLAVE)counter_rx_fifo.reset,(SLAVE)write_data_fifo_tx.reset,(SLAVE)fifo_empty_tx_status.reset,(SLAVE)fsm_info.reset,(SLAVE)timecode_tx_ready.reset,(SLAVE)write_en_tx.reset,(SLAVE)led_pio_test.reset,(SLAVE)timecode_rx.reset,(SLAVE)pll_0.reset,(SLAVE)timecode_ready_rx.reset,(SLAVE)auto_start.reset) 1 1 2 410 280 780
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.write_en_tx_external_connection,(SLAVE)write_en_tx.external_connection) 1 0 3 NJ 2160 NJ 2160 NJ
 
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.write_data_fifo_tx_external_connection,(SLAVE)write_data_fifo_tx.external_connection) 1 0 3 NJ 2060 NJ 2060 NJ
preplace netloc EXPORTulight_fifo(SLAVE)ulight_fifo.write_data_fifo_tx_external_connection,(SLAVE)write_data_fifo_tx.external_connection) 1 0 3 NJ 2060 NJ 2060 NJ
preplace netloc EXPORTulight_fifo(SLAVE)link_start.external_connection,(SLAVE)ulight_fifo.link_start_external_connection) 1 0 3 NJ 1460 NJ 1460 NJ
preplace netloc EXPORTulight_fifo(SLAVE)auto_start.external_connection,(SLAVE)ulight_fifo.auto_start_external_connection) 1 0 3 NJ 2260 NJ 2260 NJ
preplace netloc FAN_OUTulight_fifo(SLAVE)fifo_full_rx_status.s1,(SLAVE)write_data_fifo_tx.s1,(SLAVE)timecode_tx_ready.s1,(SLAVE)link_disable.s1,(SLAVE)link_start.s1,(SLAVE)counter_rx_fifo.s1,(SLAVE)auto_start.s1,(SLAVE)write_en_tx.s1,(SLAVE)fifo_full_tx_status.s1,(SLAVE)timecode_ready_rx.s1,(SLAVE)data_info.s1,(SLAVE)timecode_rx.s1,(SLAVE)data_read_en_rx.s1,(SLAVE)fsm_info.s1,(SLAVE)fifo_empty_rx_status.s1,(SLAVE)fifo_empty_tx_status.s1,(SLAVE)counter_tx_fifo.s1,(MASTER)hps_0.h2f_axi_master,(SLAVE)led_pio_test.s1,(SLAVE)clock_sel.s1,(SLAVE)data_flag_rx.s1,(SLAVE)timecode_tx_data.s1,(SLAVE)timecode_tx_enable.s1) 1 2 1 740
preplace netloc FAN_OUTulight_fifo(SLAVE)timecode_tx_enable.clk,(SLAVE)link_disable.clk,(SLAVE)counter_tx_fifo.clk,(SLAVE)clock_sel.clk,(SLAVE)data_read_en_rx.clk,(SLAVE)timecode_tx_ready.clk,(SLAVE)write_data_fifo_tx.clk,(SLAVE)hps_0.h2f_axi_clock,(SLAVE)fsm_info.clk,(SLAVE)write_en_tx.clk,(SLAVE)timecode_ready_rx.clk,(SLAVE)data_info.clk,(SLAVE)timecode_tx_data.clk,(SLAVE)auto_start.clk,(SLAVE)data_flag_rx.clk,(SLAVE)pll_0.refclk1,(SLAVE)led_pio_test.clk,(SLAVE)timecode_rx.clk,(SLAVE)fifo_empty_rx_status.clk,(SLAVE)fifo_full_rx_status.clk,(SLAVE)pll_0.refclk,(MASTER)clk_0.clk,(SLAVE)link_start.clk,(SLAVE)counter_rx_fifo.clk,(SLAVE)fifo_full_tx_status.clk,(SLAVE)fifo_empty_tx_status.clk) 1 1 2 450 240 760
preplace netloc EXPORTulight_fifo(SLAVE)counter_rx_fifo.external_connection,(SLAVE)ulight_fifo.counter_rx_fifo_external_connection) 1 0 3 NJ 60 NJ 60 NJ
preplace netloc FAN_OUTulight_fifo(SLAVE)data_read_en_rx.s1,(SLAVE)clock_sel.s1,(SLAVE)write_en_tx.s1,(SLAVE)timecode_tx_enable.s1,(SLAVE)fsm_info.s1,(SLAVE)counter_tx_fifo.s1,(SLAVE)fifo_full_tx_status.s1,(SLAVE)timecode_rx.s1,(SLAVE)link_disable.s1,(SLAVE)data_flag_rx.s1,(MASTER)hps_0.h2f_axi_master,(SLAVE)timecode_ready_rx.s1,(SLAVE)led_pio_test.s1,(SLAVE)write_data_fifo_tx.s1,(SLAVE)link_start.s1,(SLAVE)auto_start.s1,(SLAVE)timecode_tx_ready.s1,(SLAVE)fifo_empty_rx_status.s1,(SLAVE)data_info.s1,(SLAVE)fifo_full_rx_status.s1,(SLAVE)fifo_empty_tx_status.s1,(SLAVE)timecode_tx_data.s1,(SLAVE)counter_rx_fifo.s1) 1 2 1 740
preplace netloc EXPORTulight_fifo(SLAVE)pll_0.locked,(SLAVE)ulight_fifo.pll_0_locked) 1 0 3 NJ 440 NJ 440 NJ
levelinfo -pg 1 0 200 1130
preplace netloc FAN_OUTulight_fifo(SLAVE)timecode_tx_ready.reset,(SLAVE)timecode_tx_enable.reset,(SLAVE)data_flag_rx.reset,(SLAVE)timecode_rx.reset,(SLAVE)write_en_tx.reset,(SLAVE)link_disable.reset,(SLAVE)data_read_en_rx.reset,(SLAVE)clock_sel.reset,(SLAVE)link_start.reset,(SLAVE)fifo_empty_tx_status.reset,(SLAVE)data_info.reset,(SLAVE)fifo_full_tx_status.reset,(SLAVE)timecode_ready_rx.reset,(SLAVE)fsm_info.reset,(SLAVE)pll_0.reset,(MASTER)clk_0.clk_reset,(SLAVE)fifo_full_rx_status.reset,(SLAVE)counter_tx_fifo.reset,(SLAVE)auto_start.reset,(SLAVE)led_pio_test.reset,(SLAVE)write_data_fifo_tx.reset,(SLAVE)timecode_tx_data.reset,(SLAVE)fifo_empty_rx_status.reset,(SLAVE)counter_rx_fifo.reset) 1 1 2 410 280 780
levelinfo -hier ulight_fifo 210 240 570 860 1020
levelinfo -pg 1 0 200 1080
 
levelinfo -hier ulight_fifo 210 240 550 810 970
 
levelinfo -hier ulight_fifo 210 240 570 860 1020
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.