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// (C) 2001-2017 Intel Corporation. All rights reserved.
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// (C) 2001-2017 Intel Corporation. All rights reserved.
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// Your use of Intel Corporation's design tools, logic functions and other
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// Your use of Intel Corporation's design tools, logic functions and other
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// software and tools, and its AMPP partner logic functions, and any output
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// software and tools, and its AMPP partner logic functions, and any output
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// files any of the foregoing (including device programming or simulation
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// files from any of the foregoing (including device programming or simulation
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// files), and any associated documentation or information are expressly subject
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// files), and any associated documentation or information are expressly subject
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// to the terms and conditions of the Intel Program License Subscription
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// to the terms and conditions of the Intel Program License Subscription
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// Agreement, Intel MegaCore Function License Agreement, or other applicable
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// Agreement, Intel FPGA IP License Agreement, or other applicable
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// license agreement, including, without limitation, that your use is for the
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// license agreement, including, without limitation, that your use is for the
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// sole purpose of programming logic devices manufactured by Intel and sold by
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// sole purpose of programming logic devices manufactured by Intel and sold by
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// Intel or its authorized distributors. Please refer to the applicable
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// Intel or its authorized distributors. Please refer to the applicable
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// agreement for further details.
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// agreement for further details.
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`timescale 1 ps / 1 ps
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`timescale 1 ps / 1 ps
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(* altera_attribute = "-name IP_TOOL_NAME altera_mem_if_ddr3_hard_phy_core; -name IP_TOOL_VERSION 17.0; -name FITTER_ADJUST_HC_SHORT_PATH_GUARDBAND 100" *)
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(* altera_attribute = "-name IP_TOOL_NAME altera_mem_if_ddr3_hard_phy_core; -name IP_TOOL_VERSION 17.1; -name FITTER_ADJUST_HC_SHORT_PATH_GUARDBAND 100" *)
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module hps_sdram_p0 (
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module hps_sdram_p0 (
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global_reset_n,
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global_reset_n,
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soft_reset_n,
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soft_reset_n,
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csr_soft_reset_req,
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csr_soft_reset_req,
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parallelterminationcontrol,
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parallelterminationcontrol,
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