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[/] [spacewiresystemc/] [trunk/] [rtl/] [RTL_VB/] [fifo_rx.v] - Diff between revs 34 and 36

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Rev 34 Rev 36
Line 142... Line 142...
                                if(!wr_en)
                                if(!wr_en)
                                begin
                                begin
                                        block_write <= 1'b0;
                                        block_write <= 1'b0;
                                        wr_ptr <= wr_ptr + 6'd1;
                                        wr_ptr <= wr_ptr + 6'd1;
                                end
                                end
                                //mem[wr_ptr-6'd1]<=data_in;
 
                        end
                        end
                        else if (wr_en && !f_full)
                        else if (wr_en && !f_full)
                        begin
                        begin
                                block_write <= 1'b1;
                                block_write <= 1'b1;
                                mem[wr_ptr]<=data_in;
                                mem[wr_ptr]<=data_in;
 
 
                        end
                        end
 
 
                        if(wr_en && credit_counter > 6'd55)
                        if(wr_en && credit_counter > 6'd55)
                        begin
                        begin
 
 
Line 175... Line 173...
                else
                else
                begin
                begin
 
 
                        if((wr_en && !f_full && !block_write) && (rd_en && !f_empty && !block_read))
                        if((wr_en && !f_full && !block_write) && (rd_en && !f_empty && !block_read))
                        begin
                        begin
                                if(rd_ptr == 6'd8 || rd_ptr == 6'd16 || rd_ptr == 6'd24 || rd_ptr == 6'd32 || rd_ptr == 6'd40 || rd_ptr == 6'd48 || rd_ptr == 6'd56 || rd_ptr == 6'd63)
                                if(rd_ptr == 6'd7 || rd_ptr == 6'd15 || rd_ptr == 6'd23 || rd_ptr == 6'd31 || rd_ptr == 6'd39 || rd_ptr == 6'd47 || rd_ptr == 6'd55 || rd_ptr == 6'd63)
                                        credit_counter   <= credit_counter - 6'd1 + 6'd8;
                                        credit_counter   <= credit_counter - 6'd1 + 6'd8;
                                else
                                else
                                        credit_counter   <= credit_counter - 6'd1;
                                        credit_counter   <= credit_counter - 6'd1;
                        end
                        end
                        else if (wr_en && !f_full && !block_write)
                        else if (wr_en && !f_full && !block_write)
                        begin
                        begin
                                credit_counter   <= credit_counter - 6'd1;
                                credit_counter   <= credit_counter - 6'd1;
                        end
                        end
                        else if(rd_en && !f_empty && !block_read)
                        else if(rd_en && !f_empty && !block_read)
                        begin
                        begin
                                if(rd_ptr == 6'd8 || rd_ptr == 6'd16 || rd_ptr == 6'd24 || rd_ptr == 6'd32 || rd_ptr == 6'd40 || rd_ptr == 6'd48 || rd_ptr == 6'd56 || rd_ptr == 6'd63)
                                if(rd_ptr == 6'd7 || rd_ptr == 6'd15 || rd_ptr == 6'd23 || rd_ptr == 6'd31 || rd_ptr == 6'd39 || rd_ptr == 6'd47 || rd_ptr == 6'd55 || rd_ptr == 6'd63)
                                begin
                                begin
                                        credit_counter <= credit_counter + 6'd8;
                                        credit_counter <= credit_counter + 6'd8;
                                end
                                end
                        end
                        end
                        else
                        else
Line 244... Line 242...
                        block_read <= 1'b0;
                        block_read <= 1'b0;
                end
                end
                else
                else
                begin
                begin
 
 
                        if(rd_ptr == 6'd8 || rd_ptr == 6'd16 || rd_ptr == 6'd24 || rd_ptr == 6'd32 || rd_ptr == 6'd40 || rd_ptr == 6'd48 || rd_ptr == 6'd56 || rd_ptr == 6'd63)
                        if(rd_ptr == 6'd7 || rd_ptr == 6'd15 || rd_ptr == 6'd23 || rd_ptr == 6'd31 || rd_ptr == 6'd39 || rd_ptr == 6'd47 || rd_ptr == 6'd55 || rd_ptr == 6'd63)
                        begin
                        begin
                                open_slot_fct<= 1'b1;
                                open_slot_fct<= 1'b1;
                        end
                        end
                        else
                        else
                        begin
                        begin
Line 272... Line 270...
                        data_out  <= mem[rd_ptr];
                        data_out  <= mem[rd_ptr];
 
 
                end
                end
        end
        end
 
 
        //assign f_empty   = ((wr_ptr - rd_ptr) == 6'd0)?1'b1:1'b0;
 
        //assign wr        = (wr_en && !f_full)?wr_ptr + 6'd1:wr_ptr + 6'd0;
 
        //assign rd        = (rd_en && !f_empty)?rd_ptr+ 6'd1:rd_ptr + 6'd0;
 
 
 
endmodule
endmodule
 
 
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