URL https://opencores.org/ocsvn/spi_master_slave/spi_master_slave/trunk

Subversion Repositories spi_master_slave

[/] [spi_master_slave/] [trunk/] [syn/] [spi_master_atlys_test.vhd] - Diff between revs 20 and 22

Rev 20	Rev 22
Line 89...	Line 89...
`-- receives the 100 MHz clock from the board clock oscillator`	`-- receives the 100 MHz clock from the board clock oscillator`
`-- receives the 8 slide switches and 5 pushbuttons as test stimuli`	`-- receives the 8 slide switches and 5 pushbuttons as test stimuli`
`-- connects to 4 spi signals`	`-- connects to 4 spi signals`
`-- connects to 8 board LEDs`	`-- connects to 8 board LEDs`
`-- connects to 12 debug pins`	`-- connects to 12 debug pins`
`inst_spi_master_atlys_top: spi_master_atlys_top`	`-- set debounce time to 2 us to save simulation time`
	`Inst_spi_master_atlys_top: spi_master_atlys_top`
`port map(`	`port map(`
`gclk_i => sysclk,`	`gclk_i => sysclk,`
`spi_ssel_o => spi_ssel,`	`spi_ssel_o => spi_ssel,`
`spi_sck_o => spi_sck,`	`spi_sck_o => spi_sck,`
`spi_mosi_o => spi_mosi,`	`spi_mosi_o => spi_mosi,`
Line 142...	Line 143...
`btn_data(btUP) <= '1';`	`btn_data(btUP) <= '1';`
`wait for 1 us;`	`wait for 1 us;`
`btn_data(btUP) <= '0';`	`btn_data(btUP) <= '0';`
`sw_data <= X"81";`	`sw_data <= X"81";`
`wait for 5 us;`	`wait for 5 us;`
`sw_data <= X"C1";`	`sw_data <= X"65";`
`wait for 5 us;`	`wait for 5 us;`
`sw_data <= X"C9";`	`sw_data <= X"C9";`
`wait for 5 us;`	`wait for 5 us;`
`sw_data <= X"55";`	`sw_data <= X"55";`
`wait for 5 us;`	`wait for 5 us;`