OpenCores
URL https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk

Subversion Repositories srdydrdy_lib

[/] [srdydrdy_lib/] [trunk/] [env/] [verilog/] [scoreboard/] [sb_monitor.v] - Diff between revs 18 and 19

Show entire file | Details | Blame | View Log

Rev 18 Rev 19
Line 22... Line 22...
   output reg   p_drdy,
   output reg   p_drdy,
   input  [txid_sz-1:0] p_txid,
   input  [txid_sz-1:0] p_txid,
   input [width-1:0]   p_data
   input [width-1:0]   p_data
   );
   );
 
 
 
  localparam pat_dep = 8;
 
 
  reg [width-1:0]      sbmem [0:items-1];
  reg [width-1:0]      sbmem [0:items-1];
 
  reg [7:0]             drdy_pat;
 
  integer              dpp;
 
  reg                  nxt_p_drdy;
 
 
 
  reg [width-1:0]      outbuf[0:items-1];
 
 
 
  initial
 
    begin
 
      drdy_pat = {pat_dep{1'b1}};
 
      dpp = 0;
 
    end
 
 
 
  always @*
 
    begin
 
      nxt_p_drdy = p_drdy;
 
 
 
      if (p_srdy & p_drdy)
 
        begin
 
          if (drdy_pat[dpp])
 
            begin
 
              nxt_p_drdy = 1;
 
            end
 
          else
 
            nxt_p_drdy = 0;
 
        end
 
      else if (!p_drdy)
 
        begin
 
          if (drdy_pat[dpp])
 
            begin
 
              nxt_p_drdy = 1;
 
            end
 
          else
 
            nxt_p_drdy = 0;
 
        end
 
    end // always @ *
 
 
 
  always @(posedge clk)
 
    begin
 
      if ((c_srdy & p_drdy) | !p_drdy)
 
        dpp = (dpp + 1) % pat_dep;
 
 
 
      p_drdy <= #1 nxt_p_drdy;
 
    end
 
 
  always @(posedge clk)
  always @(posedge clk)
    begin
    begin
      if (c_srdy & c_drdy & (c_req_type == 1))
      if (c_srdy & c_drdy & (c_req_type == 1))
        begin
        begin
          sbmem[c_itemid] <= #20 (sbmem[c_itemid] & ~c_mask) | (c_data & c_mask);
          sbmem[c_itemid] <= #18 (sbmem[c_itemid] & ~c_mask) | (c_data & c_mask);
 
        end
 
      else if (c_srdy & c_drdy & (c_req_type == 0))
 
        begin
 
          outbuf[c_itemid] = sbmem[c_itemid];
        end
        end
 
 
      if (p_srdy & p_drdy)
      if (p_srdy & p_drdy)
        begin
        begin
          if (p_data != sbmem[p_txid])
          if (p_data != outbuf[p_txid])
            begin
            begin
              $display ("%t: ERROR: sb returned %x, expected %x",
              $display ("%t: ERROR: sb returned %x, expected %x",
                        $time, p_data, sbmem[p_txid]);
                        $time, p_data, outbuf[p_txid]);
            end
            end
        end
        end
    end
    end
 
 
  initial
  initial

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.