URL https://opencores.org/ocsvn/srdydrdy_lib/srdydrdy_lib/trunk

Subversion Repositories srdydrdy_lib

[/] [srdydrdy_lib/] [trunk/] [examples/] [bridge/] [rtl/] [port_ring_tap_fsm.v] - Diff between revs 11 and 12

Rev 11	Rev 12
Line 19...	Line 19...
`input [pdp_sz-1:0] lprx_data,`	`input [pdp_sz-1:0] lprx_data,`
`input lprx_srdy,`	`input lprx_srdy,`
`input lptx_drdy,`	`input lptx_drdy,`
`input [rdp_sz-1:0] lri_data,`	`input [rdp_sz-1:0] lri_data,`
`input lri_srdy,`	`input lri_srdy,`
`input lro_drdy`	`input lro_drdy,`

	`output rarb_req,`
	`input rarb_ack`
`);`	`);`

`reg [4:0] state, nxt_state;`	`reg [4:0] state, nxt_state;`

wire [`NUM_PORTS-1:0] port_mask;	wire [`NUM_PORTS-1:0] port_mask;
Line 41...	Line 44...
`ns_rfwd = 2,`	`ns_rfwd = 2,`
`ns_rcopy = 4,`	`ns_rcopy = 4,`
`ns_rsink = 8,`	`ns_rsink = 8,`
`ns_tdata = 16;`	`ns_tdata = 16;`

	`assign rarb_req = lfli_srdy & lprx_srdy \| state[s_tdata];`

`always @*`	`always @*`
`begin`	`begin`
`lro_data = lri_data;`	`lro_data = lri_data;`
`lptx_data = lri_data;`	`lptx_data = lri_data;`
`lfli_drdy = 0;`	`lfli_drdy = 0;`
`lprx_drdy = 0;`	`lprx_drdy = 0;`
`lptx_srdy = 0;`	`lptx_srdy = 0;`
`lri_drdy = 0;`	`lri_drdy = 0;`
`lro_srdy = 0;`	`lro_srdy = 0;`
	`nxt_state = state;`

`case (1'b1)`	`case (1'b1)`
`state[s_idle] :`	`state[s_idle] :`
`begin`	`begin`
`if (lfli_srdy)`	`if (lfli_srdy & lprx_srdy & rarb_ack)`
`begin`	`begin`
`if (lfli_data != 0)`	`if (lfli_data != 0)`
`begin`	`begin`
`lro_data = 0;`	`lro_data = 0;`
lro_data[`PRW_PVEC] = 1;	lro_data[`PRW_PVEC] = 1;