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URL https://opencores.org/ocsvn/systemverilog-uart16550/systemverilog-uart16550/trunk

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[/] [systemverilog-uart16550/] [trunk/] [sim/] [README_sim.txt] - Diff between revs 2 and 3

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Rev 2 Rev 3
?rev1line?
?rev2line?
 
 
 
 ** run simulation **  by hiroshi
 
 
 
Environment  : unix or cygwin
 
 
 
* align 4byte versoin
 
 
 
    make clean
 
    make work
 
    make align=ALIGN_4B
 
 
 
* align 1byte versoin
 
 
 
    make clean
 
    make work
 
    make align=ALIGN_1B
 
 

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