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[/] [t400/] [trunk/] [bench/] [vhdl/] [tb_int.vhd] - Diff between revs 176 and 179

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Rev 176 Rev 179
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-------------------------------------------------------------------------------
--
--
-- Testbench for interrupt evaluation.
-- Testbench for interrupt evaluation.
--
--
-- $Id: tb_int.vhd,v 1.5 2006-06-05 18:50:45 arniml Exp $
-- $Id: tb_int.vhd 179 2009-04-01 19:48:38Z arniml $
--
--
-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
--
--
-- All rights reserved
-- All rights reserved
--
--
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                        when io_g_s(1 downto 0) = "10" else
                        when io_g_s(1 downto 0) = "10" else
                          (others => 'H');
                          (others => 'H');
 
 
end behav;
end behav;
 
 
 
 
-------------------------------------------------------------------------------
 
-- File History:
 
--
 
-- $Log: not supported by cvs2svn $
 
-- Revision 1.4  2006/05/28 23:09:20  arniml
 
-- lower nibble is OD to prevent contention with testbench
 
--
 
-- Revision 1.3  2006/05/28 15:36:59  arniml
 
-- don't generate interrupt when in interrupt routine around 0x100
 
--
 
-- Revision 1.2  2006/05/28 02:53:47  arniml
 
-- provide SA at L port
 
--
 
-- Revision 1.1  2006/05/27 19:08:21  arniml
 
-- initial check-in
 
--
 
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