URL
https://opencores.org/ocsvn/t400/t400/trunk
[/] [t400/] [trunk/] [rtl/] [vhdl/] [t400_clkgen.vhd] - Diff between revs 176 and 179
Show entire file |
Details |
Blame |
View Log
| Rev 176 |
Rev 179 |
| Line 1... |
Line 1... |
-------------------------------------------------------------------------------
|
-------------------------------------------------------------------------------
|
--
|
--
|
-- The clock generation unit.
|
-- The clock generation unit.
|
-- PHI1 clock and input/output clock enables are generated here.
|
-- PHI1 clock and input/output clock enables are generated here.
|
--
|
--
|
-- $Id: t400_clkgen.vhd,v 1.1.1.1 2006-05-06 01:56:44 arniml Exp $
|
-- $Id: t400_clkgen.vhd 179 2009-04-01 19:48:38Z arniml $
|
--
|
--
|
-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
|
-- Copyright (c) 2006 Arnim Laeuger (arniml@opencores.org)
|
--
|
--
|
-- All rights reserved
|
-- All rights reserved
|
--
|
--
|
| Line 139... |
Line 139... |
-- Input sample enable
|
-- Input sample enable
|
in_en_o <= ck_en_i and ck_div_half_s;
|
in_en_o <= ck_en_i and ck_div_half_s;
|
|
|
end rtl;
|
end rtl;
|
|
|
|
|
-------------------------------------------------------------------------------
|
|
-- File History:
|
|
--
|
|
-- $Log: not supported by cvs2svn $
|
|
-------------------------------------------------------------------------------
|
|
|
|
No newline at end of file
|
No newline at end of file
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.