OpenCores
URL https://opencores.org/ocsvn/tcp_socket/tcp_socket/trunk

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [TCPIP.pdf] - Diff between revs 3 and 4

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BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (<) Tj (BUS_NAME) Tj (>) Tj (_ACK) Tj T* ET
 
Q
 
Q
 
q
 
1 0 0 1 87.71996 3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (TX to RX) Tj T* ET
 
Q
 
Q
 
q
 
1 0 0 1 143.9024 3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (bit) Tj T* ET
 
Q
 
Q
 
q
 
1 0 0 1 174.5474 3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL ('1' indicates that RX is ready.) Tj T* ET
 
Q
 
Q
 
q
 
1 J
 
1 j
 
0 0 0 RG
 
.25 w
 
n 0 54 m 469.8898 54 l S
 
n 0 36 m 469.8898 36 l S
 
n 0 18 m 469.8898 18 l S
 
n 81.71996 0 m 81.71996 72 l S
 
n 137.9024 0 m 137.9024 72 l S
 
n 168.5474 0 m 168.5474 72 l S
 
n 0 72 m 469.8898 72 l S
 
n 0 0 m 469.8898 0 l S
 
n 0 0 m 0 72 l S
 
n 469.8898 0 m 469.8898 72 l S
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 409.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 379.8236 cm
 
q
 
BT 1 0 0 1 0 3 Tm 18 TL /F2 15 Tf 0 0 0 rg (Interconnect Bus Transaction) Tj T* ET
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 367.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 367.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 355.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (Both transmitter and receiver shall be synchronised to the '0' -) Tj (> '1' transition of CLK.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 349.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 325.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 9 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 14 Tm .497988 Tw 12 TL /F1 10 Tf 0 0 0 rg (If RST is set to '1' upon the '0' -) Tj (> '1' transition of clock the transmitter shall terminate any active bus) Tj T* 0 Tw (transaction and set <) Tj (BUS_NAME) Tj (>) Tj (_STB to '0'.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 319.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 295.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 9 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 14 Tm 1.081488 Tw 12 TL /F1 10 Tf 0 0 0 rg (If RST is set to '1' upon the '0' -) Tj (> '1' transition of clock the receiver shall terminate any active bus) Tj T* 0 Tw (transaction and set <) Tj (BUS_NAME) Tj (>) Tj (_ACK to '0'.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 289.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 277.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (If RST is set to '0', normal operation shall commence as follows:) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 271.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 259.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The transmitter may insert wait states on the bus by setting <) Tj (BUS_NAME) Tj (>) Tj (_STB '0'.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 253.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 241.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The transmitter shall set <) Tj (BUS_NAME) Tj (>) Tj (_STB to '1' to signify that data is valid.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 235.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 223.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (Once <) Tj (BUS_NAME) Tj (>) Tj (_STB has been set to '1', it shall remain at '1' until the transaction completes.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 217.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 193.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 9 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 14 Tm 3.036905 Tw 12 TL /F1 10 Tf 0 0 0 rg (The transmitter shall ensure that <) Tj (BUS_NAME) Tj (> contains valid data for the entire period that) Tj T* 0 Tw (<) Tj (BUS_NAME) Tj (>) Tj (_STB is '1'.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 187.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 175.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The transmitter may set <) Tj (BUS_NAME) Tj (> to any value when <) Tj (BUS_NAME) Tj (>) Tj (_STB is '0'.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 169.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 157.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The receiver may insert wait states on the bus by setting <) Tj (BUS_NAME) Tj (>) Tj (_ACK to '0'.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 151.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 139.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (The receiver shall set <) Tj (BUS_NAME) Tj (>) Tj (_ACK to '1' to signify that it is ready to receive data.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 133.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 121.8236 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 2 Tm 12 TL /F1 10 Tf 0 0 0 rg (Once <) Tj (BUS_NAME) Tj (>) Tj (_ACK has been set to '1', it shall remain at '1' until the transaction completes.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 115.8236 cm
 
Q
 
q
 
1 0 0 1 62.69291 91.82362 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 9 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
BT 1 0 0 1 0 14 Tm 3.199069 Tw 12 TL /F1 10 Tf 0 0 0 rg (Whenever <) Tj (BUS_NAME) Tj (>) Tj (_STB is '1' and <) Tj (BUS_NAME) Tj (>) Tj (_ACK are '1', a bus transaction shall) Tj T* 0 Tw (complete on the following '0' -) Tj (> '1' transition of CLK.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 91.82362 cm
 
Q
 
 
 
endstream
 
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<< /Length 4027 >>
 
stream
 
1 0 0 1 0 0 cm  BT /F1 12 Tf 14.4 TL ET
 
q
 
1 0 0 1 62.69291 277.7734 cm
 
q
 
q
 
.96447 0 0 .96447 0 0 cm
 
q
 
1 0 0 1 6.6 6.843137 cm
 
q
 
.662745 .662745 .662745 RG
 
.5 w
 
.960784 .960784 .862745 rg
 
n -6 -6 486 504 re B*
 
Q
 
q
 
BT 1 0 0 1 0 482 Tm 12 TL /F3 10 Tf 0 0 0 rg (RST) Tj T* (                 --------------------------------------------------------------) Tj T* (                   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T* ( CLK              | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |) Tj T* (                 -   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T*  T* (                 ----- ------- ------------------------------------------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (            X VALID X) Tj T* (                 ----- ------- ------------------------------------------------) Tj T* (                       -------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_STB        |       |) Tj T* (                 -----         ------------------------------------------------) Tj T* (                           ---) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_ACK            |   |) Tj T* (                 ---------     ------------------------------------------------) Tj T*  T*  T* (                       ^^^^ RX adds wait states) Tj T*  T* (                           ^^^^  Data transfers) Tj T*  T* (RST) Tj T* (                 --------------------------------------------------------------) Tj T* (                   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T* ( CLK              | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |) Tj T* (                 -   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T*  T* (                 ----- ------- ------------------------------------------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (            X VALID X) Tj T* (                 ----- ------- ------------------------------------------------) Tj T* (                           ---) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_STB            |   |) Tj T* (                 ---------     ------------------------------------------------) Tj T* (                       -------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_ACK        |       |) Tj T* (                 -----         ------------------------------------------------) Tj T*  T*  T* (                       ^^^^ TX adds wait states) Tj T*  T* (                           ^^^^  Data transfers) Tj T* ET
 
Q
 
Q
 
Q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 263.7734 cm
 
Q
 
q
 
1 0 0 1 62.69291 263.7734 cm
 
Q
 
q
 
1 0 0 1 62.69291 251.7734 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL (Both the transmitter and receiver may commence a new transaction without inserting any wait states.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 251.7734 cm
 
Q
 
q
 
1 0 0 1 62.69291 92.15872 cm
 
q
 
q
 
.96447 0 0 .96447 0 0 cm
 
q
 
1 0 0 1 6.6 6.843137 cm
 
q
 
.662745 .662745 .662745 RG
 
.5 w
 
.960784 .960784 .862745 rg
 
n -6 -6 486 156 re B*
 
Q
 
q
 
BT 1 0 0 1 0 134 Tm 12 TL /F3 10 Tf 0 0 0 rg (RST) Tj T* (                 --------------------------------------------------------------) Tj T* (                   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T* ( CLK              | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | |) Tj T* (                 -   -   -   -   -   -   -   -   -   -   -   -   -   -   -   -) Tj T*  T* (                 ----- ------- ---- ---- --------------------------------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (            X D0    X D1 X D2 X) Tj T* (                 ----- ------- ---- ---- --------------------------------------) Tj T* (                           -------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_STB            |             |) Tj T* (                 ---------               --------------------------------------) Tj T* ET
 
Q
 
Q
 
Q
 
Q
 
Q
 
 
 
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<< /Length 2134 >>
 
stream
 
1 0 0 1 0 0 cm  BT /F1 12 Tf 14.4 TL ET
 
q
 
1 0 0 1 62.69291 659.7933 cm
 
q
 
q
 
.868237 0 0 .868237 0 0 cm
 
q
 
1 0 0 1 6.6 7.601613 cm
 
q
 
.662745 .662745 .662745 RG
 
.5 w
 
.960784 .960784 .862745 rg
 
n -6 -6 540 120 re B*
 
Q
 
q
 
BT 1 0 0 1 0 98 Tm 12 TL /F3 10 Tf 0 0 0 rg (                       -----------------) Tj T* (<) Tj (BUS_NAME) Tj (>) Tj (_ACK        |                 |) Tj T* (                 -----                   --------------------------------------) Tj T*  T* (                        ^^^^ TX adds wait states) Tj T*  T* (                             ^^^^  Data transfers) Tj T*  T* (                                 ^^^^ STB and ACK needn't return to 0 between data words) Tj T* ET
 
Q
 
Q
 
Q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 645.7933 cm
 
Q
 
q
 
1 0 0 1 62.69291 645.7933 cm
 
Q
 
q
 
1 0 0 1 62.69291 621.7933 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 9 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 14 Tm /F1 10 Tf 12 TL .483984 Tw (The receiver may delay a transaction by inserting wait states until the transmitter indicates that data) Tj T* 0 Tw (is available.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 615.7933 cm
 
Q
 
q
 
1 0 0 1 62.69291 591.7933 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 9 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 14 Tm /F1 10 Tf 12 TL 1.496235 Tw (The transmitter shall not delay a transaction by inserting wait states until the receiver is ready to) Tj T* 0 Tw (accept data.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 585.7933 cm
 
Q
 
q
 
1 0 0 1 62.69291 561.7933 cm
 
0 0 0 rg
 
BT /F1 10 Tf 12 TL ET
 
q
 
1 0 0 1 6 9 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 2 Tm /F1 10 Tf 12 TL 10.5 0 Td (\177) Tj T* -10.5 0 Td ET
 
Q
 
Q
 
q
 
1 0 0 1 23 -3 cm
 
q
 
0 0 0 rg
 
BT 1 0 0 1 0 14 Tm /F1 10 Tf 12 TL .853984 Tw (Deadlock would occur if both the transmitter and receiver delayed a transaction until the other was) Tj T* 0 Tw (ready.) Tj T* ET
 
Q
 
Q
 
q
 
Q
 
Q
 
q
 
1 0 0 1 62.69291 561.7933 cm
 
Q
 
 
 
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