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Chips is a fast and simple way to design Logic Devices. You can think of

*Chips* makes FPGA design quicker and easier. *Chips* isn't an HDL like VHDL or

a Chips design as a network on a chip. Many C Programs are all executing in

Verilog, its a different way of doing things. In *Chips*, you design components

parallel, streaming data between each other using fast on-chip connections.

using a simple subset of the C programming language. There's a Python API to

connect C components together using fast data streams to form complex, parallel

The interface is simple, design components using C, and connect them together

systems all in a single chip. You don't need to worry about clocks, resets,

to form a chip using a simple python API. Behind the scenes, chips will comvert

or timing. You don't need to follow special templates to make your code

C programs into efficient verilog implementation based on interconnected Finite

synthesisable. All that's done for you!