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[/] [thor/] [trunk/] [FT64v5/] [rtl/] [common/] [FT64_alu.v] - Diff between revs 51 and 53

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Rev 51 Rev 53
Line 1079... Line 1079...
`MEMNDX:
`MEMNDX:
        if (instr[7:6]==2'b00)
        if (instr[7:6]==2'b00)
                case(instr[`INSTRUCTION_S2])
                case(instr[`INSTRUCTION_S2])
                `LVX,
                `LVX,
    `LBX,`LBUX,`LCX,`LCUX,
    `LBX,`LBUX,`LCX,`LCUX,
 
    `LVBX,`LVBUX,`LVCX,`LVCUX,`LVHX,`LVHUX,`LVWX,
    `LHX,`LHUX,`LWX,`LWRX,`SBX,`SCX,`SHX,`SWX,`SWCX:
    `LHX,`LHUX,`LWX,`LWRX,`SBX,`SCX,`SHX,`SWX,`SWCX:
                                if (BIG) begin
                                if (BIG) begin
                                        o[63:0] = a + (b << instr[24:23]);
                                        o[63:0] = a + (b << instr[24:23]);
                                end
                                end
                                else
                                else
Line 1130... Line 1131...
`MULI:          o[63:0] = prod[DBW-1:0];
`MULI:          o[63:0] = prod[DBW-1:0];
`DIVUI:         o[63:0] = BIG ? divq : 64'hCCCCCCCCCCCCCCCC;
`DIVUI:         o[63:0] = BIG ? divq : 64'hCCCCCCCCCCCCCCCC;
`DIVI:          o[63:0] = BIG ? divq : 64'hCCCCCCCCCCCCCCCC;
`DIVI:          o[63:0] = BIG ? divq : 64'hCCCCCCCCCCCCCCCC;
`MODI:          o[63:0] = BIG ? rem : 64'hCCCCCCCCCCCCCCCC;
`MODI:          o[63:0] = BIG ? rem : 64'hCCCCCCCCCCCCCCCC;
`LB,`LBU,`SB:   o[63:0] = a + b;
`LB,`LBU,`SB:   o[63:0] = a + b;
`Lx,`LxU,`Sx:
`Lx,`LxU,`Sx,`LVx:
                        begin
                        begin
                                o[63:0] = a + b;
 
                                casez(b[2:0])
                                casez(b[2:0])
                                3'b100: o[2:0] = 3'd0;   // LW / SW
                                3'b100:         o = a + {b[63:3],3'b0}; // LW / SW
                                3'b?10: o[1:0] = 2'd0;   // LH / LHU / SH
                                3'b?10:         o = a + {b[63:2],2'b0}; // LH / LHU / SH
                                3'b??1: o[0] = 1'd0;             // LC / LCU / SC
                                default:        o = a + {b[63:1],1'b0}; // LC / LCU / SC
                                endcase
                                endcase
                        end
                        end
`LWR,`SWC,`CAS:
`LWR,`SWC,`CAS:
                        begin
                        begin
                                o[63:0] = a + b;
                                o[63:0] = a + b;
                        end
                        end
`LVx:           begin
 
                                o[63:0] = a + (instr[6] ? sxb26 : sxb10);
 
                        end
 
`LV,`SV:    begin
`LV,`SV:    begin
                                o[63:0] = a + b + {ven,3'b0};
                                o[63:0] = a + b + {ven,3'b0};
                        end
                        end
`CSRRW:     case(instr[27:18])
`CSRRW:     case(instr[27:18])
                        10'h044: o[63:0] = BIG ? csr | {thrd,24'h0} : 64'hDDDDDDDDDDDDDDDD;
                        10'h044: o[63:0] = BIG ? csr | {thrd,24'h0} : 64'hDDDDDDDDDDDDDDDD;
Line 1260... Line 1257...
case(instr[`INSTRUCTION_OP])
case(instr[`INSTRUCTION_OP])
`R2:
`R2:
    case(instr[`INSTRUCTION_S2])
    case(instr[`INSTRUCTION_S2])
    `ADD:   exc <= (fnOverflow(0,a[63],b[63],o[63]) & excen[0] & instr[24]) ? `FLT_OFL : `FLT_NONE;
    `ADD:   exc <= (fnOverflow(0,a[63],b[63],o[63]) & excen[0] & instr[24]) ? `FLT_OFL : `FLT_NONE;
    `SUB:   exc <= (fnOverflow(1,a[63],b[63],o[63]) & excen[1] & instr[24]) ? `FLT_OFL : `FLT_NONE;
    `SUB:   exc <= (fnOverflow(1,a[63],b[63],o[63]) & excen[1] & instr[24]) ? `FLT_OFL : `FLT_NONE;
    `ASL,`ASLI:     exc <= (BIG & aslo & excen[2]) ? `FLT_OFL : `FLT_NONE;
//    `ASL,`ASLI:     exc <= (BIG & aslo & excen[2]) ? `FLT_OFL : `FLT_NONE;
    `MUL,`MULSU:    exc <= prod[63] ? (prod[127:64] != 64'hFFFFFFFFFFFFFFFF && excen[3] ? `FLT_OFL : `FLT_NONE ):
    `MUL,`MULSU:    exc <= prod[63] ? (prod[127:64] != 64'hFFFFFFFFFFFFFFFF && excen[3] ? `FLT_OFL : `FLT_NONE ):
                           (prod[127:64] != 64'd0 && excen[3] ? `FLT_OFL : `FLT_NONE);
                           (prod[127:64] != 64'd0 && excen[3] ? `FLT_OFL : `FLT_NONE);
    `MULU:      exc <= prod[127:64] != 64'd0 && excen[3] ? `FLT_OFL : `FLT_NONE;
    `MULU:      exc <= prod[127:64] != 64'd0 && excen[3] ? `FLT_OFL : `FLT_NONE;
    `DIV,`DIVSU,`DIVU: exc <= BIG && excen[4] & divByZero ? `FLT_DBZ : `FLT_NONE;
    `DIV,`DIVSU,`DIVU: exc <= BIG && excen[4] & divByZero ? `FLT_DBZ : `FLT_NONE;
    `MOD,`MODSU,`MODU: exc <= BIG && excen[4] & divByZero ? `FLT_DBZ : `FLT_NONE;
    `MOD,`MODSU,`MODU: exc <= BIG && excen[4] & divByZero ? `FLT_DBZ : `FLT_NONE;

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