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[/] [thor/] [trunk/] [FT64v5/] [rtl/] [common/] [FT64_idecoder.v] - Diff between revs 52 and 53

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Rev 52 Rev 53
Line 58... Line 58...
//`CHK:   IsBranch = TRUE;
//`CHK:   IsBranch = TRUE;
//default:    IsBranch = FALSE;
//default:    IsBranch = FALSE;
//endcase
//endcase
//endfunction
//endfunction
 
 
 
wire [10:0] brdisp = instr[31:21];
 
 
wire iAlu;
wire iAlu;
mIsALU uialu1
mIsALU uialu1
(
(
        .instr(instr),
        .instr(instr),
        .IsALU(iAlu)
        .IsALU(iAlu)
Line 195... Line 197...
//end
//end
//endfunction
//endfunction
 
 
// fnCanException
// fnCanException
//
//
// Used by memory issue logic.
// Used by memory issue logic (stores).
// Returns TRUE if the instruction can cause an exception.
// Returns TRUE if the instruction can cause an exception.
// In debug mode any instruction could potentially cause a breakpoint exception.
// In debug mode any instruction could potentially cause a breakpoint exception.
// Rather than check all the addresses for potential debug exceptions it's
// Rather than check all the addresses for potential debug exceptions it's
// simpler to just have it so that all instructions could exception. This will
// simpler to just have it so that all instructions could exception. This will
// slow processing down somewhat as stores will only be done at the head of the
// slow processing down somewhat as stores will only be done at the head of the
Line 219... Line 221...
    case(isn[`INSTRUCTION_S2])
    case(isn[`INSTRUCTION_S2])
    `FDIV,`FMUL,`FADD,`FSUB,`FTX:
    `FDIV,`FMUL,`FADD,`FSUB,`FTX:
        fnCanException = `TRUE;
        fnCanException = `TRUE;
    default:    fnCanException = `FALSE;
    default:    fnCanException = `FALSE;
    endcase
    endcase
`ADDI,`DIVI,`MODI,`MULI:
`DIVI,`MODI,`MULI:
    fnCanException = `TRUE;
    fnCanException = `TRUE;
`R2:
`R2:
    case(isn[`INSTRUCTION_S2])
    case(isn[`INSTRUCTION_S2])
    `ADD,`SUB,`MUL,
    `MUL,
    `DIV,`MULSU,`DIVSU,
    `DIV,`MULSU,`DIVSU,
    `MOD,`MODSU:
    `MOD,`MODSU:
       fnCanException = TRUE;
       fnCanException = TRUE;
    `RTI:   fnCanException = TRUE;
    `RTI:   fnCanException = TRUE;
    default:    fnCanException = FALSE;
    default:    fnCanException = FALSE;
    endcase
    endcase
`Bcc:   fnCanException = TRUE;
// Had branches that could exception if looping to self. But in a tight loop
`BEQI:  fnCanException = TRUE;
// it affects store performance.
 
// -> A branch may only exception if it loops back to itself.
 
`Bcc,`BBc,`BEQI:        fnCanException = isn[7] ? brdisp == 11'h7FF : brdisp == 11'h7FE;
`CHK:   fnCanException = TRUE;
`CHK:   fnCanException = TRUE;
default:
default:
// Stores can stil exception if there is a write buffer, but we allow following
// Stores can stil exception if there is a write buffer, but we allow following
// stores to be issued by ignoring the fact they can exception because the stores
// stores to be issued by ignoring the fact they can exception because the stores
// can be undone by invalidating the write buffer.
// can be undone by invalidating the write buffer.
`ifdef HAS_WB
`ifdef HAS_WB
    fnCanException = IsLoad(isn);
    fnCanException = IsMem(isn) && !IsStore(isn);
`else
`else
    fnCanException = IsMem(isn);
    fnCanException = IsMem(isn);
`endif
`endif
endcase
endcase
end
end

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