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[/] [thor/] [trunk/] [FT64v5/] [rtl/] [twoway/] [FT64_fetchbuf.v] - Diff between revs 56 and 57

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Rev 56 Rev 57
Line 164... Line 164...
IsRTI = isn[`INSTRUCTION_OP]==`R2 && isn[`INSTRUCTION_S2]==`RTI;
IsRTI = isn[`INSTRUCTION_OP]==`R2 && isn[`INSTRUCTION_S2]==`RTI;
endfunction
endfunction
 
 
function [2:0] fnInsLength;
function [2:0] fnInsLength;
input [47:0] ins;
input [47:0] ins;
 
`ifdef SUPPORT_DCI
if (ins[`INSTRUCTION_OP]==`CMPRSSD)
if (ins[`INSTRUCTION_OP]==`CMPRSSD)
        fnInsLength = 3'd2;
        fnInsLength = 3'd2;
else
else
 
`endif
        case(ins[7:6])
        case(ins[7:6])
        2'd0:   fnInsLength = 3'd4;
        2'd0:   fnInsLength = 3'd4;
        2'd1:   fnInsLength = 3'd6;
        2'd1:   fnInsLength = 3'd6;
        default:        fnInsLength = 3'd2;
        default:        fnInsLength = 3'd2;
        endcase
        endcase
Line 202... Line 204...
 
 
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
// Table of decompressed instructions.
// Table of decompressed instructions.
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
assign ack_o = cs_i & cyc_i & stb_i;
assign ack_o = cs_i & cyc_i & stb_i;
 
`ifdef SUPPORT_DCI
reg [47:0] DecompressTable [0:2047];
reg [47:0] DecompressTable [0:2047];
always @(posedge clk)
always @(posedge clk)
        if (cs_i & cyc_i & stb_i & we_i)
        if (cs_i & cyc_i & stb_i & we_i)
                DecompressTable[adr_i[12:3]] <= dat_i[47:0];
                DecompressTable[adr_i[12:3]] <= dat_i[47:0];
wire [47:0] expand0 = DecompressTable[{cmpgrp,insn0[15:8]}];
wire [47:0] expand0 = DecompressTable[{cmpgrp,insn0[15:8]}];
wire [47:0] expand1 = DecompressTable[{cmpgrp,insn1[15:8]}];
wire [47:0] expand1 = DecompressTable[{cmpgrp,insn1[15:8]}];
 
`endif
 
 
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
// - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 
 
 
reg thread;
reg thread;
Line 812... Line 816...
assign fetchbuf1_thrd  = thread_en;
assign fetchbuf1_thrd  = thread_en;
 
 
reg [2:0] insln0, insln1;
reg [2:0] insln0, insln1;
always @*
always @*
begin
begin
 
`ifdef SUPPORT_DCI
        if (insn0[5:0]==`CMPRSSD)
        if (insn0[5:0]==`CMPRSSD)
                insln0 <= 3'd2;
                insln0 <= 3'd2;
        else if (insn0[7:6]==2'b00 && insn0[`INSTRUCTION_OP]==`EXEC)
        else
 
`endif
 
        if (insn0[7:6]==2'b00 && insn0[`INSTRUCTION_OP]==`EXEC)
                insln0 <= fnInsLength(codebuf0);
                insln0 <= fnInsLength(codebuf0);
        else
        else
                insln0 <= fnInsLength(insn0);
                insln0 <= fnInsLength(insn0);
end
end
 
 
always @*
always @*
begin
begin
 
`ifdef SUPPORT_DCI
        if (insn1[5:0]==`CMPRSSD)
        if (insn1[5:0]==`CMPRSSD)
                insln1 <= 3'd2;
                insln1 <= 3'd2;
        else if (insn1[7:6]==2'b00 && insn1[`INSTRUCTION_OP]==`EXEC)
        else
 
`endif
 
        if (insn1[7:6]==2'b00 && insn1[`INSTRUCTION_OP]==`EXEC)
                insln1 <= fnInsLength(codebuf1);
                insln1 <= fnInsLength(codebuf1);
        else
        else
                insln1 <= fnInsLength(insn1);
                insln1 <= fnInsLength(insn1);
end
end
 
 
reg [47:0] cinsn0, cinsn1;
reg [47:0] cinsn0, cinsn1;
 
 
always @*
always @*
begin
begin
 
`ifdef SUPPORT_DCI
        if (insn0[5:0]==`CMPRSSD)
        if (insn0[5:0]==`CMPRSSD)
                cinsn0 <= expand0;
                cinsn0 <= expand0;
        else if (insn0[7:6]==2'b00 && insn0[`INSTRUCTION_OP]==`EXEC)
        else
 
`endif
 
        if (insn0[7:6]==2'b00 && insn0[`INSTRUCTION_OP]==`EXEC)
                cinsn0 <= codebuf0;
                cinsn0 <= codebuf0;
        else if (insn0[7])
        else if (insn0[7])
                cinsn0 <= xinsn0;
                cinsn0 <= xinsn0;
        else
        else
                cinsn0 <= insn0;
                cinsn0 <= insn0;
end
end
 
 
always @*
always @*
begin
begin
 
`ifdef SUPPORT_DCI
        if (insn1[5:0]==`CMPRSSD)
        if (insn1[5:0]==`CMPRSSD)
                cinsn1 <= expand1;
                cinsn1 <= expand1;
        else if (insn1[7:6]==2'b00 && insn1[`INSTRUCTION_OP]==`EXEC)
        else
 
`endif
 
        if (insn1[7:6]==2'b00 && insn1[`INSTRUCTION_OP]==`EXEC)
                cinsn1 <= codebuf1;
                cinsn1 <= codebuf1;
        else if (insn1[7])
        else if (insn1[7])
                cinsn1 <= xinsn1;
                cinsn1 <= xinsn1;
        else
        else
                cinsn1 <= insn1;
                cinsn1 <= insn1;

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