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[/] [turbo8051/] [trunk/] [verif/] [model/] [oc8051_xram.v] - Diff between revs 61 and 76
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// Revision 1.3 2002/09/30 17:34:01 simont
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// Revision 1.3 2002/09/30 17:34:01 simont
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// prepared header
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// prepared header
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//
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//
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//
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//
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// synopsys translate_off
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`include "oc8051_timescale.v"
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// synopsys translate_on
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module oc8051_xram (clk, rst, wr, be, addr, data_in, data_out, ack, stb);
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module oc8051_xram (clk, rst, wr, be, addr, data_in, data_out, ack, stb);
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//
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//
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// external data ram for simulation. part of oc8051_tb
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// external data ram for simulation. part of oc8051_tb
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// it's tehnology dependent
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// it's tehnology dependent
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