| Line 1... |
Line 1... |
//-----------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
//
|
//
|
// UART2BUS VERIFICATION
|
// UART2BUS VERIFICATION
|
//
|
//
|
//-----------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
// CREATOR : HANY SALAH
|
// CREATOR : HANY SALAH
|
// PROJECT : UART2BUS UVM TEST BENCH
|
// PROJECT : UART2BUS UVM TEST BENCH
|
// UNIT : DRIVER
|
// UNIT : DRIVER
|
//-----------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
// TITLE : UART Driver
|
// TITLE : UART DRIVER
|
// DESCRIPTION: This
|
// DESCRIPTION: THIS DRIVER IS RESPONSIBLE FOR SETTING BFMS CONFIGURATIONS. ALSO DRIVING STIMULUS
|
//-----------------------------------------------------------------------------
|
// TO THE BFMS AND SENDING TRANSACTIONS TO SCOREBOARD.
|
|
//-------------------------------------------------------------------------------------------------
|
// LOG DETAILS
|
// LOG DETAILS
|
//-------------
|
//-------------
|
// VERSION NAME DATE DESCRIPTION
|
// VERSION NAME DATE DESCRIPTION
|
// 1 HANY SALAH 02012016 FILE CREATION
|
// 1 HANY SALAH 02012016 FILE CREATION
|
// 2 HANY SALAH 07012016 ADD INITIALIZE BFM METHOD
|
// 2 HANY SALAH 07012016 ADD INITIALIZE BFM METHOD
|
//-----------------------------------------------------------------------------
|
// 3 HANY SALAH 17022016 IMPROVE BLOCK DESCRIPTION AND ADD COMMENTS
|
// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR
|
//-------------------------------------------------------------------------------------------------
|
// OPENCORES MEMBERS ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE
|
// ALL COPYRIGHTS ARE RESERVED FOR THE PRODUCER ONLY .THIS FILE IS PRODUCED FOR OPENCORES MEMBERS
|
// CREATOR'S PERMISSION
|
// ONLY AND IT IS PROHIBTED TO USE THIS MATERIAL WITHOUT THE CREATOR'S PERMISSION
|
//-----------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------
|
|
|
class uart_driver extends uvm_driver #(uart_transaction);
|
class uart_driver extends uvm_driver #(uart_transaction);
|
|
|
// Two Transaction Instances that are used to bring and clone the
|
// Two Transaction Instances that are used to bring and clone the stimulus
|
// stimulus
|
|
uart_transaction trans,_trans;
|
uart_transaction trans,_trans;
|
|
|
// Instance from Global UART Configuration
|
// Instance from Global UART Configuration
|
uart_config _config;
|
uart_config _config;
|
|
|
| Line 37... |
Line 37... |
virtual rf_interface rf_inf;
|
virtual rf_interface rf_inf;
|
|
|
// Arbiter Interface Instance
|
// Arbiter Interface Instance
|
virtual uart_arbiter arb_inf;
|
virtual uart_arbiter arb_inf;
|
|
|
|
// Analysis Port to both scoreboard and driver
|
uvm_analysis_port #(uart_transaction) drv_scbd_cov;
|
uvm_analysis_port #(uart_transaction) drv_scbd_cov;
|
|
|
`uvm_component_utils(uart_driver)
|
`uvm_component_utils(uart_driver)
|
|
|
function new (string name , uvm_component parent);
|
function new (string name , uvm_component parent);
|
super.new(name,parent);
|
super.new(name,parent);
|
endfunction: new
|
endfunction: new
|
|
|
function void display_content ();
|
// UVM Build Phase Declaration that includes locating instances and get interfaces handler from
|
$display("here %s\n command_type = %p \n command = %p \n char_type = %p \n space_type1 = %p \n space_wrong1 = %8b \n space_type2 = %p \n space_wrong2 = %8b \n eol_type = %p \n eol_wrong = %8b \n address = %h \n data = %8b", get_full_name(),trans._mode,
|
// the configuration database
|
trans._command,
|
|
trans._chartype,
|
|
trans._spacetype1,
|
|
trans.space_wrong1,
|
|
trans._spacetype2,
|
|
trans.space_wrong2,
|
|
trans._eoltype,
|
|
trans.eol_wrong,
|
|
trans.address,
|
|
trans._data[0]);
|
|
endfunction:display_content
|
|
|
|
// UVM Build Phase Declaration that includes locating instances and get
|
|
// interfaces handler from the configuration database
|
|
extern function void build_phase (uvm_phase phase);
|
extern function void build_phase (uvm_phase phase);
|
|
|
|
// Both BFMs configurations setting and BFMs assignment are carried out through this UVM phase.
|
extern function void end_of_elaboration_phase (uvm_phase phase);
|
extern function void end_of_elaboration_phase (uvm_phase phase);
|
|
|
// UVM Run Phase Declaratio
|
|
extern task run_phase (uvm_phase phase);
|
extern task run_phase (uvm_phase phase);
|
|
|
// Actual drive data routine
|
// Actual drive data routine
|
extern task drive_data (int iteration);
|
extern task drive_data ();
|
|
|
// initialize bfms
|
// initialize bfms
|
extern function void initialize_bfms (act_edge _edge,
|
extern function void initialize_bfms (act_edge _edge,
|
start_bit _bit,
|
start_bit _bit,
|
|
int enable,
|
int num_stop_bits,
|
int num_stop_bits,
|
int num_of_bits,
|
int num_of_bits,
|
data_mode _datamode,
|
data_mode _datamode,
|
parity_mode _paritymode,
|
parity_mode _paritymode,
|
time _resp);
|
time _resp);
|
| Line 110... |
Line 98... |
|
|
if(!uvm_config_db#(virtual uart_arbiter)::get(this,"","arb_inf",_config.arb_inf))
|
if(!uvm_config_db#(virtual uart_arbiter)::get(this,"","arb_inf",_config.arb_inf))
|
`uvm_fatal("NOVIF",{"virtual interface must be set for:",get_full_name(),".arb_inf"})
|
`uvm_fatal("NOVIF",{"virtual interface must be set for:",get_full_name(),".arb_inf"})
|
arb_inf=_config.arb_inf;
|
arb_inf=_config.arb_inf;
|
|
|
|
initialize_bfms(_config._edge,
|
|
_config._start,
|
|
_config.use_false_data,
|
|
_config.num_stop_bits,
|
|
_config.num_of_bits,
|
|
_config._datamode,
|
|
_config._paritymode,
|
|
_config.response_time);
|
|
|
endfunction:end_of_elaboration_phase
|
endfunction:end_of_elaboration_phase
|
|
|
function void uart_driver::initialize_bfms (act_edge _edge,
|
function void uart_driver::initialize_bfms (act_edge _edge,
|
start_bit _bit,
|
start_bit _bit,
|
|
int enable,
|
int num_stop_bits,
|
int num_stop_bits,
|
int num_of_bits,
|
int num_of_bits,
|
data_mode _datamode,
|
data_mode _datamode,
|
parity_mode _paritymode,
|
parity_mode _paritymode,
|
time _resp);
|
time _resp);
|
uart_inf.set_configuration(_edge,_bit,num_stop_bits,num_of_bits,_datamode,_paritymode,_resp);
|
uart_inf.set_configuration (_edge,_bit,num_stop_bits,num_of_bits,_datamode,_paritymode,_resp,enable);
|
endfunction:initialize_bfms
|
endfunction:initialize_bfms
|
|
|
task uart_driver::run_phase (uvm_phase phase);
|
task uart_driver::run_phase (uvm_phase phase);
|
|
|
int iteration;
|
|
iteration = 0;
|
|
|
|
initialize_bfms(_config._edge,
|
|
_config._start,
|
|
_config.num_stop_bits,
|
|
_config.num_of_bits,
|
|
_config._datamode,
|
|
_config._paritymode,
|
|
_config.response_time);
|
|
|
|
forever
|
forever
|
begin
|
begin
|
iteration++;
|
|
if (iteration == 3)
|
|
begin
|
|
//$stop;
|
|
end
|
|
seq_item_port.get_next_item(_trans);
|
seq_item_port.get_next_item(_trans);
|
$cast(trans,_trans.clone());
|
$cast(trans,_trans.clone());
|
drv_scbd_cov.write(trans);
|
drv_scbd_cov.write(trans);
|
//display_content();
|
drive_data();
|
drive_data(iteration);
|
|
seq_item_port.item_done();
|
seq_item_port.item_done();
|
end
|
end
|
endtask:run_phase
|
endtask:run_phase
|
|
|
task uart_driver::drive_data(int iteration);
|
task uart_driver::drive_data();
|
uart_inf.wait_idle_time(trans.time_before*trans.scale);
|
uart_inf.wait_idle_time(trans.time_before*trans.scale);
|
uart_inf.set_event();
|
uart_inf.set_event();
|
case (trans._mode)
|
if (trans._mode == text || trans._mode == wrong_mode_text)
|
text:
|
|
begin
|
begin
|
case(trans._command)
|
case(trans._command)
|
read:
|
read:
|
begin
|
begin
|
fork
|
/*fork
|
begin
|
begin
|
if (trans._arbit == accept)
|
if (trans._arbit == accept)
|
begin
|
begin
|
arb_inf.accept_req();
|
arb_inf.accept_req();
|
end
|
end
|
else
|
else
|
begin
|
begin
|
arb_inf.declain_req();
|
arb_inf.declain_req();
|
end
|
end
|
end
|
end
|
join_none
|
join_none*/
|
rf_inf.fill_byte (trans.address,
|
rf_inf.fill_byte (trans.address,
|
trans._data[0]);
|
trans._data[0]);
|
uart_inf.read_text_mode(trans._chartype,
|
uart_inf.read_text_mode(trans._mode,
|
|
trans.wrong_prefix,
|
|
trans._chartype,
|
trans._spacetype1,
|
trans._spacetype1,
|
trans.space_wrong1,
|
trans.space_wrong1,
|
trans._eoltype,
|
trans._eoltype,
|
trans.eol_wrong,
|
trans.eol_wrong,
|
trans.address);
|
trans.address,
|
|
trans.false_data[0],
|
|
trans.false_data_en);
|
|
|
end
|
end
|
write:
|
write:
|
begin
|
begin
|
fork
|
/*fork
|
begin
|
begin
|
if (trans._arbit == accept)
|
if (trans._arbit == accept)
|
begin
|
begin
|
arb_inf.accept_req();
|
arb_inf.accept_req();
|
end
|
end
|
else
|
else
|
begin
|
begin
|
arb_inf.declain_req();
|
arb_inf.declain_req();
|
end
|
end
|
end
|
end
|
join_none
|
join_none*/
|
uart_inf.write_text_mode(trans._chartype,
|
uart_inf.write_text_mode(trans._mode,
|
|
trans.wrong_prefix,
|
|
trans._chartype,
|
trans._spacetype1,
|
trans._spacetype1,
|
trans.space_wrong1,
|
trans.space_wrong1,
|
trans._spacetype2,
|
trans._spacetype2,
|
trans.space_wrong2,
|
trans.space_wrong2,
|
trans._eoltype,
|
trans._eoltype,
|
trans.eol_wrong,
|
trans.eol_wrong,
|
trans.address,
|
trans.address,
|
trans._data[0]);
|
trans._data[0]);
|
|
|
end
|
end
|
nop:
|
nop:
|
begin
|
begin
|
`uvm_fatal("UNEXPECTED VALUE","NOP command value shouldn't be valued in text mode")
|
`uvm_fatal("UNEXPECTED VALUE","NOP command value shouldn't be valued in text mode")
|
end
|
end
|
| Line 215... |
Line 203... |
begin
|
begin
|
`uvm_fatal("wrong output", "wrong_mode")
|
`uvm_fatal("wrong output", "wrong_mode")
|
end
|
end
|
endcase
|
endcase
|
end
|
end
|
binary:
|
else if (trans._mode==binary || trans._mode==wrong_mode_bin)
|
begin
|
begin
|
case(trans._command)
|
if (trans._command == read || trans._command == invalid_read)
|
read:
|
|
begin
|
begin
|
rf_inf.fill_block(trans.address,
|
rf_inf.fill_block(trans.address,
|
trans._data,
|
trans._data,
|
trans.length_data);
|
trans.length_data);
|
uart_inf.read_binary_mode(trans._reqack,
|
uart_inf.read_binary_mode(trans._mode,
|
|
trans.wrong_prefix,
|
|
trans._command,
|
|
trans._reqack,
|
trans._reqinc,
|
trans._reqinc,
|
trans.length_data,
|
trans.length_data,
|
trans.address,
|
trans.address,
|
trans._data);
|
trans._data,
|
|
trans.false_data,
|
|
trans.false_data_en);
|
end
|
end
|
write:
|
else if (trans._command == write || trans._command == invalid_write)
|
begin
|
begin
|
uart_inf.write_binary_mode(trans._reqack,
|
uart_inf.write_binary_mode(trans._mode,
|
|
trans.wrong_prefix,
|
|
trans._command,
|
|
trans._reqack,
|
trans._reqinc,
|
trans._reqinc,
|
trans.length_data,
|
trans.length_data,
|
trans.address,
|
trans.address,
|
trans._data);
|
trans._data);
|
end
|
end
|
nop:
|
else
|
begin
|
begin
|
uart_inf.nop_command(trans._reqack,
|
uart_inf.nop_command(trans._mode,
|
|
trans.wrong_prefix,
|
|
trans._reqack,
|
trans._reqinc);
|
trans._reqinc);
|
end
|
end
|
default:
|
|
begin
|
|
`uvm_fatal("UNDEFINED COMMAND","Binary command should be either read or write or no operation")
|
|
end
|
|
endcase
|
|
end
|
|
wrong_mode:
|
|
begin
|
|
uart_inf.wrong_command(trans._reqack,
|
|
trans._reqinc,
|
|
trans.space_wrong1,
|
|
trans.length_data,
|
|
trans.address,
|
|
trans._data);
|
|
end
|
|
default:
|
|
begin
|
|
`uvm_fatal("UNEXPECTED VALUE","Command should be text or command or wrong")
|
|
end
|
end
|
endcase
|
|
uart_inf.wait_idle_time(trans.time_after*trans.scale);
|
uart_inf.wait_idle_time(trans.time_after*trans.scale);
|
endtask:drive_data
|
endtask:drive_data
|
No newline at end of file
|
No newline at end of file
|
