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--! Unsigned division circuit, based on slow division algorithm (Restoring division)
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--! @file
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--! @brief Unsigned division circuit, based on slow division algorithm (Restoring division)
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--! http://en.wikipedia.org/wiki/Division_%28digital%29
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--! http://en.wikipedia.org/wiki/Division_%28digital%29
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--! The problem with this algorithm is that will take the same ammount of ticks (on this case 32) of
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--! it's operands to resolve...
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library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.std_logic_arith.all;
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use IEEE.std_logic_arith.all;
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--! Use CPU Definitions package
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--! Use CPU Definitions package
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use work.pkgDefinitions.all;
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use work.pkgDefinitions.all;
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entity divisor is
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entity divisor is
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Port ( rst : in STD_LOGIC;
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Port ( rst : in STD_LOGIC; --! Reset input
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clk : in STD_LOGIC;
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clk : in STD_LOGIC; --! Clock input
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quotient : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0);
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quotient : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! Division result (32 bits)
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reminder : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0);
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reminder : out STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! Reminder result (32 bits)
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numerator : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0);
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numerator : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! Numerator (32 bits)
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divident : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0);
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divident : in STD_LOGIC_VECTOR ((nBitsLarge-1) downto 0); --! "Divide by" number (32 bits)
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done : out STD_LOGIC);
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done : out STD_LOGIC);
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end divisor;
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end divisor;
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--! @brief Top divisor architecture
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--! @details http://en.wikipedia.org/wiki/Division_%28digital%29
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architecture Behavioral of divisor is
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architecture Behavioral of divisor is
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begin
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begin
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-- Division algorithm Q=N/D
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-- Division algorithm Q=N/D
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if (R >= D) then
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if (R >= D) then
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R := R - D;
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R := R - D;
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Q(iteractions) := '1';
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Q(iteractions) := '1';
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end if;
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end if;
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else
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else
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-- We have the results here...
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done <= '1';
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done <= '1';
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quotient <= CONV_STD_LOGIC_VECTOR(Q,32);
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quotient <= CONV_STD_LOGIC_VECTOR(Q,32);
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reminder <= CONV_STD_LOGIC_VECTOR(R,32);
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reminder <= CONV_STD_LOGIC_VECTOR(R,32);
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-- Used to avoid transparent latch (Good practise)
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-- Used to avoid transparent latch (Good practise)
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