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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [fuse.log] - Diff between revs 23 and 24

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Rev 23 Rev 24
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WARNING:HDLCompiler:946 - "/home/laraujo/work/uart_block/hdl/iseProject/uart_communication_blocks.vhd" Line 63: Actual for formal port rst is neither a static name nor a globally static expression
WARNING:HDLCompiler:946 - "/home/laraujo/work/uart_block/hdl/iseProject/uart_communication_blocks.vhd" Line 63: Actual for formal port rst is neither a static name nor a globally static expression
Parsing VHDL file "/home/laraujo/work/uart_block/hdl/iseProject/uart_wishbone_slave.vhd" into library work
Parsing VHDL file "/home/laraujo/work/uart_block/hdl/iseProject/uart_wishbone_slave.vhd" into library work
Parsing VHDL file "/home/laraujo/work/uart_block/hdl/iseProject/testUart_wishbone_slave.vhd" into library work
Parsing VHDL file "/home/laraujo/work/uart_block/hdl/iseProject/testUart_wishbone_slave.vhd" into library work
Starting static elaboration
Starting static elaboration
Completed static elaboration
Completed static elaboration
Fuse Memory Usage: 37476 KB
Fuse Memory Usage: 37472 KB
Fuse CPU Usage: 1090 ms
Fuse CPU Usage: 1110 ms
Compiling package standard
Compiling package standard
Compiling package std_logic_1164
Compiling package std_logic_1164
Compiling package std_logic_arith
Compiling package std_logic_arith
Compiling package std_logic_unsigned
Compiling package std_logic_unsigned
Compiling package pkgdefinitions
Compiling package pkgdefinitions
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Compiling architecture behavior of entity testuart_wishbone_slave
Compiling architecture behavior of entity testuart_wishbone_slave
Time Resolution for simulation is 1ps.
Time Resolution for simulation is 1ps.
Waiting for 1 sub-compilation(s) to finish...
Waiting for 1 sub-compilation(s) to finish...
Compiled 21 VHDL Units
Compiled 21 VHDL Units
Built simulation executable /home/laraujo/work/uart_block/hdl/iseProject/testUart_wishbone_slave_isim_beh.exe
Built simulation executable /home/laraujo/work/uart_block/hdl/iseProject/testUart_wishbone_slave_isim_beh.exe
Fuse Memory Usage: 89272 KB
Fuse Memory Usage: 90296 KB
Fuse CPU Usage: 1260 ms
Fuse CPU Usage: 1280 ms
GCC CPU Usage: 260 ms
GCC CPU Usage: 230 ms
GCC CPU Usage: 230 ms
GCC CPU Usage: 230 ms

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