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[/] [udp_ip_stack/] [trunk/] [bench/] [vhdl/] [IP_complete_nomac_tb.vhd] - Diff between revs 4 and 8

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Line 38... Line 38...
ARCHITECTURE behavior OF IP_complete_nomac_tb IS
ARCHITECTURE behavior OF IP_complete_nomac_tb IS
 
 
    -- Component Declaration for the Unit Under Test (UUT)
    -- Component Declaration for the Unit Under Test (UUT)
 
 
    COMPONENT IP_complete_nomac
    COMPONENT IP_complete_nomac
    PORT(
         generic (
 
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
 
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
 
                        );
 
    Port (
                        -- IP Layer signals
                        -- IP Layer signals
                        ip_tx_start                             : in std_logic;
                        ip_tx_start                             : in std_logic;
                        ip_tx                                           : in ipv4_tx_type;                                                              -- IP tx cxns
                        ip_tx                                           : in ipv4_tx_type;                                                              -- IP tx cxns
                        ip_tx_result                    : out std_logic_vector (1 downto 0);             -- tx status (changes during transmission)
                        ip_tx_result                    : out std_logic_vector (1 downto 0);             -- tx status (changes during transmission)
                        ip_tx_data_out_ready    : out std_logic;                                                                        -- indicates IP TX is ready to take data
                        ip_tx_data_out_ready    : out std_logic;                                                                        -- indicates IP TX is ready to take data
Line 52... Line 56...
                        rx_clk                                  : in  STD_LOGIC;
                        rx_clk                                  : in  STD_LOGIC;
                        tx_clk                                  : in  STD_LOGIC;
                        tx_clk                                  : in  STD_LOGIC;
                        reset                                   : in  STD_LOGIC;
                        reset                                   : in  STD_LOGIC;
                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);
                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);
                        our_mac_address                 : in std_logic_vector (47 downto 0);
                        our_mac_address                 : in std_logic_vector (47 downto 0);
 
                        control                                 : in ip_control_type;
                        -- status signals
                        -- status signals
                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received
                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received
                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us
                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us
                        -- MAC Transmitter
                        -- MAC Transmitter
                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx
                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx
Line 82... Line 87...
   signal our_mac_address : std_logic_vector(47 downto 0) := (others => '0');
   signal our_mac_address : std_logic_vector(47 downto 0) := (others => '0');
   signal mac_tx_tready : std_logic := '0';
   signal mac_tx_tready : std_logic := '0';
   signal mac_rx_tdata : std_logic_vector(7 downto 0) := (others => '0');
   signal mac_rx_tdata : std_logic_vector(7 downto 0) := (others => '0');
   signal mac_rx_tvalid : std_logic := '0';
   signal mac_rx_tvalid : std_logic := '0';
   signal mac_rx_tlast : std_logic := '0';
   signal mac_rx_tlast : std_logic := '0';
 
        signal control                  : ip_control_type;
 
 
        --Outputs
        --Outputs
        signal ip_tx_result : std_logic_vector (1 downto 0);                                             -- tx status (changes during transmission)
        signal ip_tx_result : std_logic_vector (1 downto 0);                                             -- tx status (changes during transmission)
        signal ip_tx_data_out_ready     :  std_logic;                                                                   -- indicates IP TX is ready to take data
        signal ip_tx_data_out_ready     :  std_logic;                                                                   -- indicates IP TX is ready to take data
   signal ip_rx_start : std_logic;
   signal ip_rx_start : std_logic;
   signal ip_rx : ipv4_rx_type;
   signal ip_rx : ipv4_rx_type;
Line 112... Line 119...
          rx_clk => clk,
          rx_clk => clk,
          tx_clk => clk,
          tx_clk => clk,
          reset => reset,
          reset => reset,
          our_ip_address => our_ip_address,
          our_ip_address => our_ip_address,
          our_mac_address => our_mac_address,
          our_mac_address => our_mac_address,
 
                         control => control,
          arp_pkt_count => arp_pkt_count,
          arp_pkt_count => arp_pkt_count,
          mac_tx_tdata => mac_tx_tdata,
          mac_tx_tdata => mac_tx_tdata,
          mac_tx_tvalid => mac_tx_tvalid,
          mac_tx_tvalid => mac_tx_tvalid,
          mac_tx_tready => mac_tx_tready,
          mac_tx_tready => mac_tx_tready,
                         mac_tx_tfirst => mac_tx_tfirst,
                         mac_tx_tfirst => mac_tx_tfirst,
Line 142... Line 150...
      -- hold reset state for 100 ns.
      -- hold reset state for 100 ns.
      wait for 80 ns;
      wait for 80 ns;
 
 
                our_ip_address <= x"c0a80509";          -- 192.168.5.9
                our_ip_address <= x"c0a80509";          -- 192.168.5.9
                our_mac_address <= x"002320212223";
                our_mac_address <= x"002320212223";
 
                control.arp_controls.clear_cache <= '0';
                ip_tx_start <= '0';
                ip_tx_start <= '0';
      mac_tx_tready <= '0';
      mac_tx_tready <= '0';
 
 
                reset <= '1';
                reset <= '1';
      wait for clk_period*10;
      wait for clk_period*10;

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