----------------------------------------------------------------------------------
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----------------------------------------------------------------------------------
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-- Company:
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-- Company:
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-- Engineer: Peter Fall
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-- Engineer: Peter Fall
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--
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--
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-- Create Date: 12:00:04 05/31/2011
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-- Create Date: 12:00:04 05/31/2011
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-- Design Name:
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-- Design Name:
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-- Module Name: arpv2 - Structural
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-- Module Name: arpv2 - Structural
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-- Project Name:
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-- Project Name:
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-- Target Devices:
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-- Target Devices:
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-- Tool versions:
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-- Tool versions:
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-- Description:
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-- Description:
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-- handle simple IP lookup in 1-deep cache and arp store
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-- handle simple IP lookup in 1-deep cache and arp store
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-- request cache fill through ARP protocol if required
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-- request cache fill through ARP protocol if required
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-- Handle ARP protocol
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-- Handle ARP protocol
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-- Respond to ARP requests and replies
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-- Respond to ARP requests and replies
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-- Ignore pkts that are not ARP
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-- Ignore pkts that are not ARP
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-- Ignore pkts that are not addressed to us
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-- Ignore pkts that are not addressed to us
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--
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--
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-- structural decomposition includes
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-- structural decomposition includes
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-- arp TX block - encoding of ARP protocol
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-- arp TX block - encoding of ARP protocol
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-- arp RX block - decoding of ARP protocol
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-- arp RX block - decoding of ARP protocol
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-- arp REQ block - sequencing requests for resolution
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-- arp REQ block - sequencing requests for resolution
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-- arp STORE block - storing address resolution entries (indexed by IP addr)
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-- arp STORE block - storing address resolution entries (indexed by IP addr)
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-- arp sync block - sync between master RX clock and TX clock domains
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-- arp sync block - sync between master RX clock and TX clock domains
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--
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--
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-- Dependencies:
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-- Dependencies:
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--
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--
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-- Revision:
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-- Revision:
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-- Revision 0.01 - File Created
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-- Revision 0.01 - File Created
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-- Additional Comments:
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-- Additional Comments:
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--
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--
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----------------------------------------------------------------------------------
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----------------------------------------------------------------------------------
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library IEEE;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_1164.all;
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use IEEE.NUMERIC_STD.ALL;
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use IEEE.NUMERIC_STD.all;
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use work.arp_types.all;
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use work.arp_types.all;
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|
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entity arpv2 is
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entity arpv2 is
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generic (
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generic (
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no_default_gateway : boolean := true; -- set to false if communicating with devices accessed
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-- though a "default gateway or router"
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CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr
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CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr
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ARP_TIMEOUT : integer := 60; -- ARP response timeout (s)
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ARP_TIMEOUT : integer := 60; -- ARP response timeout (s)
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ARP_MAX_PKT_TMO : integer := 5; -- # wrong nwk pkts received before set error
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ARP_MAX_PKT_TMO : integer := 5; -- # wrong nwk pkts received before set error
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MAX_ARP_ENTRIES : integer := 255 -- max entries in the arp store
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MAX_ARP_ENTRIES : integer := 255 -- max entries in the arp store
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);
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);
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Port (
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port (
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-- lookup request signals
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-- lookup request signals
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arp_req_req : in arp_req_req_type;
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arp_req_req : in arp_req_req_type;
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arp_req_rslt : out arp_req_rslt_type;
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arp_req_rslt : out arp_req_rslt_type;
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-- MAC layer RX signals
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-- MAC layer RX signals
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data_in_clk : in STD_LOGIC;
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data_in_clk : in std_logic;
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reset : in STD_LOGIC;
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reset : in std_logic;
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data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock
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data_in_valid : in std_logic; -- indicates data_in valid on clock
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data_in_last : in STD_LOGIC; -- indicates last data in frame
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data_in_last : in std_logic; -- indicates last data in frame
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-- MAC layer TX signals
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-- MAC layer TX signals
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mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx)
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mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx)
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mac_tx_granted : in std_logic; -- indicates that access to channel has been granted
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mac_tx_granted : in std_logic; -- indicates that access to channel has been granted
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data_out_clk : in std_logic;
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data_out_clk : in std_logic;
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data_out_ready : in std_logic; -- indicates system ready to consume data
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data_out_ready : in std_logic; -- indicates system ready to consume data
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data_out_valid : out std_logic; -- indicates data out is valid
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data_out_valid : out std_logic; -- indicates data out is valid
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data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame
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data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame
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data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame
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data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame
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data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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-- system signals
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-- system signals
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our_mac_address : in STD_LOGIC_VECTOR (47 downto 0);
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our_mac_address : in std_logic_vector (47 downto 0);
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our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);
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our_ip_address : in std_logic_vector (31 downto 0);
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nwk_gateway : in std_logic_vector (31 downto 0) := (others => '0'); -- IP address of default gateway
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nwk_mask : in std_logic_vector (31 downto 0) := (others => '0'); -- Net mask
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control : in arp_control_type;
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control : in arp_control_type;
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req_count : out STD_LOGIC_VECTOR(7 downto 0) -- count of arp pkts received
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req_count : out std_logic_vector(7 downto 0) -- count of arp pkts received
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);
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);
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end arpv2;
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end arpv2;
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architecture structural of arpv2 is
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architecture structural of arpv2 is
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COMPONENT arp_req
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component arp_req
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generic (
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generic (
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no_default_gateway : boolean := true;
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CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr
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CLOCK_FREQ : integer := 125000000; -- freq of data_in_clk -- needed to timout cntr
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ARP_TIMEOUT : integer := 60; -- ARP response timeout (s)
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ARP_TIMEOUT : integer := 60; -- ARP response timeout (s)
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ARP_MAX_PKT_TMO : integer := 5 -- # wrong nwk pkts received before set error
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ARP_MAX_PKT_TMO : integer := 5 -- # wrong nwk pkts received before set error
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);
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);
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Port (
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port (
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-- lookup request signals
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-- lookup request signals
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arp_req_req : in arp_req_req_type; -- request for a translation from IP to MAC
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arp_req_req : in arp_req_req_type; -- request for a translation from IP to MAC
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arp_req_rslt : out arp_req_rslt_type; -- the result
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arp_req_rslt : out arp_req_rslt_type; -- the result
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-- external arp store signals
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-- external arp store signals
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arp_store_req : out arp_store_rdrequest_t; -- requesting a lookup or store
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arp_store_req : out arp_store_rdrequest_t; -- requesting a lookup or store
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arp_store_result : in arp_store_result_t; -- the result
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arp_store_result : in arp_store_result_t; -- the result
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-- network request signals
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-- network request signals
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arp_nwk_req : out arp_nwk_request_t; -- requesting resolution via the network
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arp_nwk_req : out arp_nwk_request_t; -- requesting resolution via the network
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arp_nwk_result : in arp_nwk_result_t; -- the result
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arp_nwk_result : in arp_nwk_result_t; -- the result
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-- system signals
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-- system signals
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clear_cache : in std_logic; -- clear the internal cache
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clear_cache : in std_logic; -- clear the internal cache
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nwk_gateway : in std_logic_vector(31 downto 0); -- IP address of default gateway
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nwk_mask : in std_logic_vector(31 downto 0); -- Net mask
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clk : in std_logic;
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clk : in std_logic;
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reset : in STD_LOGIC
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reset : in std_logic
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);
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);
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END COMPONENT;
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end component;
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COMPONENT arp_tx
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component arp_tx
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PORT(
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port(
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-- control signals
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-- control signals
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send_I_have : in std_logic; -- pulse will be latched
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send_I_have : in std_logic; -- pulse will be latched
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arp_entry : in arp_entry_t; -- arp target for I_have req (will be latched)
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arp_entry : in arp_entry_t; -- arp target for I_have req (will be latched)
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send_who_has : in std_logic; -- pulse will be latched
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send_who_has : in std_logic; -- pulse will be latched
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ip_entry : in STD_LOGIC_VECTOR (31 downto 0); -- ip target for who_has req (will be latched)
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ip_entry : in std_logic_vector (31 downto 0); -- ip target for who_has req (will be latched)
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-- MAC layer TX signals
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-- MAC layer TX signals
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mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx)
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mac_tx_req : out std_logic; -- indicates that ip wants access to channel (stays up for as long as tx)
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mac_tx_granted : in std_logic; -- indicates that access to channel has been granted
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mac_tx_granted : in std_logic; -- indicates that access to channel has been granted
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data_out_ready : in std_logic; -- indicates system ready to consume data
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data_out_ready : in std_logic; -- indicates system ready to consume data
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data_out_valid : out std_logic; -- indicates data out is valid
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data_out_valid : out std_logic; -- indicates data out is valid
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data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame
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data_out_first : out std_logic; -- with data out valid indicates the first byte of a frame
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data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame
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data_out_last : out std_logic; -- with data out valid indicates the last byte of a frame
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data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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data_out : out std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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-- system signals
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-- system signals
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our_mac_address : in STD_LOGIC_VECTOR (47 downto 0);
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our_mac_address : in std_logic_vector (47 downto 0);
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our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);
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our_ip_address : in std_logic_vector (31 downto 0);
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tx_clk : in std_logic;
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tx_clk : in std_logic;
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reset : in std_logic
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reset : in std_logic
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);
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);
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END COMPONENT;
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end component;
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COMPONENT arp_rx
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component arp_rx
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PORT(
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port(
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-- MAC layer RX signals
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-- MAC layer RX signals
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data_in : in STD_LOGIC_VECTOR (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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data_in : in std_logic_vector (7 downto 0); -- ethernet frame (from dst mac addr through to last byte of frame)
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data_in_valid : in STD_LOGIC; -- indicates data_in valid on clock
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data_in_valid : in std_logic; -- indicates data_in valid on clock
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data_in_last : in STD_LOGIC; -- indicates last data in frame
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data_in_last : in std_logic; -- indicates last data in frame
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-- ARP output signals
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-- ARP output signals
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recv_who_has : out std_logic; -- pulse will be latched
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recv_who_has : out std_logic; -- pulse will be latched
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arp_entry_for_who_has : out arp_entry_t; -- target for who_has msg (Iie, who to reply to)
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arp_entry_for_who_has : out arp_entry_t; -- target for who_has msg (Iie, who to reply to)
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recv_I_have : out std_logic; -- pulse will be latched
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recv_I_have : out std_logic; -- pulse will be latched
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arp_entry_for_I_have : out arp_entry_t; -- arp target for I_have msg
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arp_entry_for_I_have : out arp_entry_t; -- arp target for I_have msg
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-- control and status signals
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-- control and status signals
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req_count : out STD_LOGIC_VECTOR(7 downto 0); -- count of arp pkts received
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req_count : out std_logic_vector(7 downto 0); -- count of arp pkts received
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-- system signals
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-- system signals
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our_ip_address : in STD_LOGIC_VECTOR (31 downto 0);
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our_ip_address : in std_logic_vector (31 downto 0);
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rx_clk : in std_logic;
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rx_clk : in std_logic;
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reset : in STD_LOGIC
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reset : in std_logic
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);
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);
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END COMPONENT;
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end component;
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COMPONENT arp_store_br
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component arp_store_br
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generic (
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generic (
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MAX_ARP_ENTRIES : integer := 255 -- max entries in the store
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MAX_ARP_ENTRIES : integer := 255 -- max entries in the store
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);
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);
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Port (
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port (
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-- read signals
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-- read signals
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read_req : in arp_store_rdrequest_t; -- requesting a lookup or store
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read_req : in arp_store_rdrequest_t; -- requesting a lookup or store
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read_result : out arp_store_result_t; -- the result
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read_result : out arp_store_result_t; -- the result
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-- write signals
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-- write signals
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write_req : in arp_store_wrrequest_t; -- requesting a lookup or store
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write_req : in arp_store_wrrequest_t; -- requesting a lookup or store
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-- control and status signals
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-- control and status signals
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clear_store : in std_logic; -- erase all entries
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clear_store : in std_logic; -- erase all entries
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entry_count : out unsigned(7 downto 0); -- how many entries currently in store
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entry_count : out unsigned(7 downto 0); -- how many entries currently in store
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-- system signals
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-- system signals
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clk : in std_logic;
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clk : in std_logic;
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reset : in STD_LOGIC
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reset : in std_logic
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);
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);
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END COMPONENT;
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end component;
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COMPONENT arp_sync
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component arp_sync
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Port (
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port (
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-- REQ to TX
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-- REQ to TX
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arp_nwk_req : in arp_nwk_request_t; -- request for a translation from IP to MAC
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arp_nwk_req : in arp_nwk_request_t; -- request for a translation from IP to MAC
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send_who_has : out std_logic;
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send_who_has : out std_logic;
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ip_entry : out STD_LOGIC_VECTOR (31 downto 0);
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ip_entry : out std_logic_vector (31 downto 0);
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-- RX to TX
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-- RX to TX
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recv_who_has : in std_logic; -- this is for us, we will respond
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recv_who_has : in std_logic; -- this is for us, we will respond
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arp_entry_for_who_has : in arp_entry_t;
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arp_entry_for_who_has : in arp_entry_t;
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send_I_have : out std_logic;
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send_I_have : out std_logic;
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arp_entry : out arp_entry_t;
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arp_entry : out arp_entry_t;
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-- RX to REQ
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-- RX to REQ
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I_have_received : in std_logic;
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I_have_received : in std_logic;
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nwk_result_status : out arp_nwk_rslt_t;
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nwk_result_status : out arp_nwk_rslt_t;
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-- System Signals
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-- System Signals
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rx_clk : in std_logic;
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rx_clk : in std_logic;
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tx_clk : in std_logic;
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tx_clk : in std_logic;
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reset : in std_logic
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reset : in std_logic
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);
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);
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END COMPONENT;
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end component;
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|
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|
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-- interconnect REQ -> ARP_TX
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-- interconnect REQ -> ARP_TX
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signal arp_nwk_req_int : arp_nwk_request_t; -- tx req from REQ
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signal arp_nwk_req_int : arp_nwk_request_t; -- tx req from REQ
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|
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signal send_I_have_int : std_logic;
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signal send_I_have_int : std_logic;
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signal arp_entry_int : arp_entry_t;
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signal arp_entry_int : arp_entry_t;
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signal send_who_has_int : std_logic;
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signal send_who_has_int : std_logic;
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signal ip_entry_int : STD_LOGIC_VECTOR (31 downto 0);
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signal ip_entry_int : std_logic_vector (31 downto 0);
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|
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-- interconnect REQ <-> ARP_STORE
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-- interconnect REQ <-> ARP_STORE
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signal arp_store_req_int : arp_store_rdrequest_t; -- lookup request
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signal arp_store_req_int : arp_store_rdrequest_t; -- lookup request
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signal arp_store_result_int: arp_store_result_t; -- lookup result
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signal arp_store_result_int : arp_store_result_t; -- lookup result
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|
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-- interconnect ARP_RX -> REQ
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-- interconnect ARP_RX -> REQ
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signal nwk_result_status_int : arp_nwk_rslt_t; -- response from a TX req
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signal nwk_result_status_int : arp_nwk_rslt_t; -- response from a TX req
|
|
|
-- interconnect ARP_RX -> ARP_STORE
|
-- interconnect ARP_RX -> ARP_STORE
|
signal recv_I_have_int : std_logic; -- path to store new arp entry
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signal recv_I_have_int : std_logic; -- path to store new arp entry
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signal arp_entry_for_I_have_int: arp_entry_t;
|
signal arp_entry_for_I_have_int : arp_entry_t;
|
|
|
-- interconnect ARP_RX -> ARP_TX
|
-- interconnect ARP_RX -> ARP_TX
|
signal recv_who_has_int : std_logic; -- path for reply when we can anser
|
signal recv_who_has_int : std_logic; -- path for reply when we can anser
|
signal arp_entry_for_who_has_int : arp_entry_t; -- target for who_has msg (ie, who to reply to)
|
signal arp_entry_for_who_has_int : arp_entry_t; -- target for who_has msg (ie, who to reply to)
|
|
|
|
|
begin
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begin
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|
|
|
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req : arp_req
|
req : arp_req
|
generic map (
|
generic map (
|
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no_default_gateway => no_default_gateway,
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CLOCK_FREQ => CLOCK_FREQ,
|
CLOCK_FREQ => CLOCK_FREQ,
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ARP_TIMEOUT => ARP_TIMEOUT,
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ARP_TIMEOUT => ARP_TIMEOUT,
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ARP_MAX_PKT_TMO => ARP_MAX_PKT_TMO
|
ARP_MAX_PKT_TMO => ARP_MAX_PKT_TMO
|
)
|
)
|
PORT MAP (
|
port map (
|
-- lookup request signals
|
-- lookup request signals
|
arp_req_req => arp_req_req,
|
arp_req_req => arp_req_req,
|
arp_req_rslt => arp_req_rslt,
|
arp_req_rslt => arp_req_rslt,
|
-- external arp store signals
|
-- external arp store signals
|
arp_store_req => arp_store_req_int,
|
arp_store_req => arp_store_req_int,
|
arp_store_result => arp_store_result_int,
|
arp_store_result => arp_store_result_int,
|
-- network request signals
|
-- network request signals
|
arp_nwk_req => arp_nwk_req_int,
|
arp_nwk_req => arp_nwk_req_int,
|
arp_nwk_result.status => nwk_result_status_int,
|
arp_nwk_result.status => nwk_result_status_int,
|
arp_nwk_result.entry => arp_entry_for_I_have_int,
|
arp_nwk_result.entry => arp_entry_for_I_have_int,
|
-- system signals
|
-- system signals
|
clear_cache => control.clear_cache,
|
clear_cache => control.clear_cache,
|
|
nwk_gateway => nwk_gateway,
|
|
nwk_mask => nwk_mask,
|
clk => data_in_clk,
|
clk => data_in_clk,
|
reset => reset
|
reset => reset
|
);
|
);
|
|
|
sync : arp_sync PORT MAP (
|
sync : arp_sync port map (
|
-- REQ to TX
|
-- REQ to TX
|
arp_nwk_req => arp_nwk_req_int,
|
arp_nwk_req => arp_nwk_req_int,
|
send_who_has => send_who_has_int,
|
send_who_has => send_who_has_int,
|
ip_entry => ip_entry_int,
|
ip_entry => ip_entry_int,
|
-- RX to TX
|
-- RX to TX
|
recv_who_has => recv_who_has_int,
|
recv_who_has => recv_who_has_int,
|
arp_entry_for_who_has => arp_entry_for_who_has_int,
|
arp_entry_for_who_has => arp_entry_for_who_has_int,
|
send_I_have => send_I_have_int,
|
send_I_have => send_I_have_int,
|
arp_entry => arp_entry_int,
|
arp_entry => arp_entry_int,
|
-- RX to REQ
|
-- RX to REQ
|
I_have_received => recv_I_have_int,
|
I_have_received => recv_I_have_int,
|
nwk_result_status => nwk_result_status_int,
|
nwk_result_status => nwk_result_status_int,
|
-- system
|
-- system
|
rx_clk => data_in_clk,
|
rx_clk => data_in_clk,
|
tx_clk => data_out_clk,
|
tx_clk => data_out_clk,
|
reset => reset
|
reset => reset
|
);
|
);
|
|
|
tx : arp_tx PORT MAP (
|
tx : arp_tx port map (
|
-- control signals
|
-- control signals
|
send_I_have => send_I_have_int,
|
send_I_have => send_I_have_int,
|
arp_entry => arp_entry_int,
|
arp_entry => arp_entry_int,
|
send_who_has => send_who_has_int,
|
send_who_has => send_who_has_int,
|
ip_entry => ip_entry_int,
|
ip_entry => ip_entry_int,
|
-- MAC layer TX signals
|
-- MAC layer TX signals
|
mac_tx_req => mac_tx_req,
|
mac_tx_req => mac_tx_req,
|
mac_tx_granted => mac_tx_granted,
|
mac_tx_granted => mac_tx_granted,
|
data_out_ready => data_out_ready,
|
data_out_ready => data_out_ready,
|
data_out_valid => data_out_valid,
|
data_out_valid => data_out_valid,
|
data_out_first => data_out_first,
|
data_out_first => data_out_first,
|
data_out_last => data_out_last,
|
data_out_last => data_out_last,
|
data_out => data_out,
|
data_out => data_out,
|
-- system signals
|
-- system signals
|
our_ip_address => our_ip_address,
|
our_ip_address => our_ip_address,
|
our_mac_address => our_mac_address,
|
our_mac_address => our_mac_address,
|
tx_clk => data_out_clk,
|
tx_clk => data_out_clk,
|
reset => reset
|
reset => reset
|
);
|
);
|
|
|
rx : arp_rx PORT MAP (
|
rx : arp_rx port map (
|
-- MAC layer RX signals
|
-- MAC layer RX signals
|
data_in => data_in,
|
data_in => data_in,
|
data_in_valid => data_in_valid,
|
data_in_valid => data_in_valid,
|
data_in_last => data_in_last,
|
data_in_last => data_in_last,
|
-- ARP output signals
|
-- ARP output signals
|
recv_who_has => recv_who_has_int,
|
recv_who_has => recv_who_has_int,
|
arp_entry_for_who_has=> arp_entry_for_who_has_int,
|
arp_entry_for_who_has => arp_entry_for_who_has_int,
|
recv_I_have => recv_I_have_int,
|
recv_I_have => recv_I_have_int,
|
arp_entry_for_I_have=> arp_entry_for_I_have_int,
|
arp_entry_for_I_have => arp_entry_for_I_have_int,
|
-- control and status signals
|
-- control and status signals
|
req_count => req_count,
|
req_count => req_count,
|
-- system signals
|
-- system signals
|
our_ip_address => our_ip_address,
|
our_ip_address => our_ip_address,
|
rx_clk => data_in_clk,
|
rx_clk => data_in_clk,
|
reset => reset
|
reset => reset
|
);
|
);
|
|
|
store : arp_store_br
|
store : arp_store_br
|
generic map (
|
generic map (
|
MAX_ARP_ENTRIES => MAX_ARP_ENTRIES
|
MAX_ARP_ENTRIES => MAX_ARP_ENTRIES
|
)
|
)
|
PORT MAP (
|
port map (
|
-- read signals
|
-- read signals
|
read_req => arp_store_req_int,
|
read_req => arp_store_req_int,
|
read_result => arp_store_result_int,
|
read_result => arp_store_result_int,
|
-- write signals
|
-- write signals
|
write_req.req => recv_I_have_int,
|
write_req.req => recv_I_have_int,
|
write_req.entry => arp_entry_for_I_have_int,
|
write_req.entry => arp_entry_for_I_have_int,
|
-- control and status signals
|
-- control and status signals
|
clear_store => control.clear_cache,
|
clear_store => control.clear_cache,
|
entry_count => open,
|
entry_count => open,
|
-- system signals
|
-- system signals
|
clk => data_in_clk,
|
clk => data_in_clk,
|
reset => reset
|
reset => reset
|
);
|
);
|
|
|
|
|
end structural;
|
end structural;
|
|
|
|
|
