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Subversion Repositories udp_ip_stack

[/] [udp_ip_stack/] [trunk/] [rtl/] [vhdl/] [ml605/] [UDP_Complete.vhd] - Diff between revs 8 and 10

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Rev 8 Rev 10
Line 26... Line 26...
use work.arp_types.all;
use work.arp_types.all;
 
 
entity UDP_Complete is
entity UDP_Complete is
         generic (
         generic (
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
                        ARP_TIMEOUT                     : integer := 60;                                                                        -- ARP response timeout (s)
 
                        ARP_MAX_PKT_TMO : integer := 5;                                                                 -- # wrong nwk pkts received before set error
 
                        MAX_ARP_ENTRIES         : integer := 255                                                                        -- max entries in the ARP store
                        );
                        );
    Port (
    Port (
                        -- UDP TX signals
                        -- UDP TX signals
                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP
                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP
                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns
                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns
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                        gmii_crs             : in  std_logic;
                        gmii_crs             : in  std_logic;
                        mii_tx_clk           : in  std_logic
                        mii_tx_clk           : in  std_logic
                        );
                        );
end UDP_Complete;
end UDP_Complete;
 
 
 
 
 
 
 
 
architecture structural of UDP_Complete is
architecture structural of UDP_Complete is
 
 
  ------------------------------------------------------------------------------
  ------------------------------------------------------------------------------
  -- Component Declaration for UDP complete no mac
  -- Component Declaration for UDP complete no mac
  ------------------------------------------------------------------------------
  ------------------------------------------------------------------------------
 
 
    COMPONENT UDP_Complete_nomac
    COMPONENT UDP_Complete_nomac
         generic (
         generic (
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
                        ARP_TIMEOUT                     : integer := 60;                                                                        -- ARP response timeout (s)
 
                        ARP_MAX_PKT_TMO : integer := 5;                                                                 -- # wrong nwk pkts received before set error
 
                        MAX_ARP_ENTRIES         : integer := 255                                                                        -- max entries in the ARP store
                        );
                        );
    Port (
    Port (
                        -- UDP TX signals
                        -- UDP TX signals
                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP
                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP
                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns
                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns
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  ------------------------------------------------------------------------------
  ------------------------------------------------------------------------------
  -- Component Declaration for the MAC layer
  -- Component Declaration for the MAC layer
  ------------------------------------------------------------------------------
  ------------------------------------------------------------------------------
component mac_layer
component mac_v2_2
 
-- component xv6mac_straight
         port (
         port (
                        -- System controls
                        -- System controls
                        ------------------
                        ------------------
                        glbl_rst                      : in  std_logic;                                  -- asynchronous reset
                        glbl_rst                      : in  std_logic;                                  -- asynchronous reset
                        mac_reset                       : in  std_logic;                                                        -- reset mac layer
                        mac_reset                       : in  std_logic;                                                        -- reset mac layer
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   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
 
 
   udp_block: UDP_Complete_nomac
   udp_block: UDP_Complete_nomac
                                generic map (
                                generic map (
                         CLOCK_FREQ                     => CLOCK_FREQ,
                         CLOCK_FREQ                     => CLOCK_FREQ,
                         ARP_TIMEOUT            => ARP_TIMEOUT
                         ARP_TIMEOUT            => ARP_TIMEOUT,
 
                         ARP_MAX_PKT_TMO        => ARP_MAX_PKT_TMO,
 
                         MAX_ARP_ENTRIES        => MAX_ARP_ENTRIES
                         )
                         )
                        PORT MAP (
                        PORT MAP (
                         -- UDP TX signals
                         -- UDP TX signals
          udp_tx_start                  => udp_tx_start,
          udp_tx_start                  => udp_tx_start,
          udp_txi                               => udp_txi,
          udp_txi                               => udp_txi,
Line 236... Line 246...
 
 
 
 
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
   -- Instantiate the MAC layer
   -- Instantiate the MAC layer
   ------------------------------------------------------------------------------
   ------------------------------------------------------------------------------
        mac_block : mac_layer
        mac_block : mac_v2_2
 
--      mac_block : xv6mac_straight
                 Port map(
                 Port map(
                                -- System controls
                                -- System controls
                                ------------------
                                ------------------
                                glbl_rst                                => reset,
                                glbl_rst                                => reset,
                                mac_reset         => '0',
                                mac_reset         => '0',
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end structural;
end structural;
 
 
 
 
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