| Line 4... |
Line 4... |
|
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echo "===>"
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echo "===>"
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echo "===> Recompiling Sources"
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echo "===> Recompiling Sources"
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echo "===>"
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echo "===>"
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|
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if {[file exists work]} { vdel -lib work -all }
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#if {[file exists work]} { vdel -lib work -all }
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vlib work
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vlib D:/Design/work
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vmap work D:/Design/My_USB_Controller/work
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vmap work D:/Design/work
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# Open Cores USB Phy, designed by Rudolf Usselmanns and translated to VHDL by Martin Neumann
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# Open Cores USB Phy, designed by Rudolf Usselmanns and translated to VHDL by Martin Neumann
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vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_phy/usb_rx_phy_60MHz.vhdl
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|
vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_phy/usb_tx_phy.vhdl
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vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_phy/usb_rx_phy_60MHz.vhdl
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vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_phy/usb_phy.vhdl
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vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_phy/usb_tx_phy.vhdl
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vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_phy/usb_phy.vhdl
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|
|
# Open Cores USB Serial, designed by Joris van Rantwijk
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# Open Cores USB Serial, designed by Joris van Rantwijk
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vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_serial/usb_pkg.vhdl
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vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_serial/usb_pkg.vhdl
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vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_serial/usb_init.vhdl
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vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_serial/usb_init.vhdl
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vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_serial/usb_control.vhdl
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vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_serial/usb_control.vhdl
|
vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_serial/usb_transact.vhdl
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vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_serial/usb_transact.vhdl
|
vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_serial/usb_packet.vhdl
|
vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_serial/usb_packet.vhdl
|
vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_serial/usb_serial.vhdl
|
vcom -93 -work work D:/design/completed_vhdl/usb_fs_port/usb_serial/usb_serial.vhdl
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vcom -93 -work work D:/Design/My_USB_Controller/Source/usb_fs_slave.vhdl
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|
|
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# The USB FS test bench files
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# The USB FS test bench files
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vcom -93 -work work D:/Design/My_USB_Controller/Testbench/usb_commands.vhd
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vcom -93 -work work D:/OpenCores/usb11_sim_model/trunk/usb_fs_port.vhdl
|
vcom -93 -work work D:/Design/My_USB_Controller/Testbench/usb_stimuli.vhd
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vcom -93 -work work D:/OpenCores/usb11_sim_model/trunk/usb_commands.vhd
|
vcom -93 -work work D:/Design/My_usb_Controller/Testbench/usb_fs_monitor.vhd
|
vcom -93 -work work D:/OpenCores/usb11_sim_model/trunk/usb_stimuli.vhd
|
vcom -93 -work work D:/Design/My_usb_Controller/Testbench/usb_fs_master.vhd
|
vcom -93 -work work D:/OpenCores/usb11_sim_model/trunk/usb_fs_monitor.vhd
|
vcom -93 -work work D:/Design/My_USB_Controller/Testbench/usb_tb.vhd
|
vcom -93 -work work D:/OpenCores/usb11_sim_model/trunk/usb_fs_master.vhd
|
|
vcom -93 -work work D:/OpenCores/usb11_sim_model/trunk/usb_tb.vhd
|
|
|
echo "===>"
|
echo "===>"
|
echo "===> Start Simulation"
|
echo "===> Start Simulation"
|
echo "===>"
|
echo "===>"
|
vsim -quiet usb_tb
|
vsim -quiet usb_tb
|
