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Subversion Repositories usb_fpga_1_2

[/] [usb_fpga_1_2/] [trunk/] [java/] [ztex/] [Ztex1v1.java] - Diff between revs 8 and 9

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Line 37... Line 37...
                Offs    Description
                Offs    Description
                0        1: unconfigured, 0:configured
                0        1: unconfigured, 0:configured
                1       checksum
                1       checksum
                2-5     transferred bytes
                2-5     transferred bytes
                6       INIT_B state
                6       INIT_B state
 
                7       Flash configuration result
 
                8       Flash bitstream bit order (1=swapped)
 
 
        VC 0x31 : reset FPGA
        VC 0x31 : reset FPGA
        VC 0x32 : send FPGA configuration data (Bitstream)
        VC 0x32 : send FPGA configuration data (Bitstream)
 
 
    0.2  : Flash memory support
    0.2  : Flash memory support
        VR 0x40 : read Flash state
        VR 0x40 : read Flash state
Line 91... Line 94...
        VR 0x3D : MAC EEPROM state
        VR 0x3D : MAC EEPROM state
            Returns:
            Returns:
                Offs    Description
                Offs    Description
                0        0:idle, 1:busy or error
                0        0:idle, 1:busy or error
 
 
 
    0.7  : Multi-FPGA support
 
        VR 0x50 : Return multi-FPGA information
 
            Returns:
 
                Offs    Description
 
                0       Number of FPGA's - 1
 
                1       Selected FPGA - 1
 
                2       Parallel configuration support (0:no, 1:yes)
 
        VC 0x51 : set CS
 
            Parameters:
 
                index: Select command
 
                    0 : select single FPGA
 
                    1 : select all FPGA's for configuration
 
                value: FPGA to select - 1
 
 
*/
*/
package ztex;
package ztex;
 
 
import java.io.*;
import java.io.*;
import java.util.*;
import java.util.*;
Line 187... Line 204...
  *               </tr>
  *               </tr>
  *               <tr>
  *               <tr>
  *                 <td bgcolor="#ffffff" valign="top">6</td>
  *                 <td bgcolor="#ffffff" valign="top">6</td>
  *                 <td bgcolor="#ffffff" valign="top">INIT_B states.</td>
  *                 <td bgcolor="#ffffff" valign="top">INIT_B states.</td>
  *               </tr>
  *               </tr>
 
  *               <tr>
 
  *                 <td bgcolor="#ffffff" valign="top">7</td>
 
  *                 <td bgcolor="#ffffff" valign="top">Flash configuration result.</td>
 
  *               </tr>
 
  *               <tr>
 
  *                 <td bgcolor="#ffffff" valign="top">8</td>
 
  *                 <td bgcolor="#ffffff" valign="top">Flash Bitstreambit order (1=swapped).</td>
 
  *               </tr>
  *             </table>
  *             </table>
  *           </td>
  *           </td>
  *         </tr>
  *         </tr>
  *         <tr>
  *         <tr>
  *           <td bgcolor="#ffffff" valign="top">VC 0x31</td>
  *           <td bgcolor="#ffffff" valign="top">VC 0x31</td>
Line 420... Line 445...
  *           </td>
  *           </td>
  *         </tr>
  *         </tr>
  *       </table>
  *       </table>
  *     </td>
  *     </td>
  *   </tr>
  *   </tr>
 
  *   <tr>
 
  *     <td bgcolor="#ffffff" valign="top">0.7</td>
 
  *     <td bgcolor="#ffffff" valign="top" colspan=2>
 
  *       Multi-FPGA support<p>
 
  *       <table bgcolor="#404040" cellspacing=1 cellpadding=6>
 
  *         <tr>
 
  *           <td bgcolor="#d0d0d0" valign="bottom"><b>Vendor request (VR)<br> or command (VC)</b></td>
 
  *           <td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
 
  *         </tr>
 
  *         <tr>
 
  *           <td bgcolor="#ffffff" valign="top">VR 0x50</td>
 
  *           <td bgcolor="#ffffff" valign="top">Return multi-FPGA information:
 
  *             <table bgcolor="#404040" cellspacing=1 cellpadding=4>
 
  *               <tr>
 
  *                 <td bgcolor="#d0d0d0" valign="bottom"><b>Bytes</b></td>
 
  *                 <td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
 
  *               </tr>
 
  *               <tr>
 
  *                 <td bgcolor="#ffffff" valign="top">0</td>
 
  *                 <td bgcolor="#ffffff" valign="top">Number of FPGA's - 1</td>
 
  *               </tr>
 
  *               <tr>
 
  *                 <td bgcolor="#ffffff" valign="top">1</td>
 
  *                 <td bgcolor="#ffffff" valign="top">Selected FPGA - 1</td>
 
  *               </tr>
 
  *               <tr>
 
  *                 <td bgcolor="#ffffff" valign="top">2</td>
 
  *                 <td bgcolor="#ffffff" valign="top">Parallel configuration support (0:no, 1:yes)</td>
 
  *               </tr>
 
  *             </table>
 
  *           </td>
 
  *         </tr>
 
  *         <tr>
 
  *           <td bgcolor="#ffffff" valign="top">VC 0x51</td>
 
  *           <td bgcolor="#ffffff" valign="top">Parameters:
 
  *             <table bgcolor="#404040" cellspacing=1 cellpadding=4>
 
  *               <tr>
 
  *                 <td bgcolor="#d0d0d0" valign="bottom"><b>Parameter</b></td>
 
  *                 <td bgcolor="#d0d0d0" valign="bottom"><b>Description</b></td>
 
  *               </tr>
 
  *               <tr>
 
  *                 <td bgcolor="#ffffff" valign="top">index</td>
 
  *                 <td bgcolor="#ffffff" valign="top">Select command<br> 0: Select single FPGA <br> 1: Select all FPGA's for configuration</td>
 
  *               </tr>
 
  *               <tr>
 
  *                 <td bgcolor="#ffffff" valign="top">value</td>
 
  *                 <td bgcolor="#ffffff" valign="top">FPGA to select - 1</td>
 
  *               </tr>
 
  *             </table>
 
  *           </td>
 
  *         </tr>
 
  *       </table>
 
  *     </td>
 
  *   </tr>
  * </table>
  * </table>
  * @see ZtexDevice1
  * @see ZtexDevice1
  * @see Ztex1
  * @see Ztex1
  */
  */
 
 
Line 441... Line 520...
    public static final int CAPABILITY_XMEGA = 4;
    public static final int CAPABILITY_XMEGA = 4;
    /** * Capability index for AVR XMEGA support. */
    /** * Capability index for AVR XMEGA support. */
    public static final int CAPABILITY_HS_FPGA = 5;
    public static final int CAPABILITY_HS_FPGA = 5;
    /** * Capability index for AVR XMEGA support. */
    /** * Capability index for AVR XMEGA support. */
    public static final int CAPABILITY_MAC_EEPROM = 6;
    public static final int CAPABILITY_MAC_EEPROM = 6;
 
    /** * Capability index for multi FPGA support */
 
    public static final int CAPABILITY_MULTI_FPGA = 7;
 
 
    /** * The names of the capabilities */
    /** * The names of the capabilities */
    public static final String capabilityStrings[] = {
    public static final String capabilityStrings[] = {
        "EEPROM read/write" ,
        "EEPROM read/write" ,
        "FPGA configuration" ,
        "FPGA configuration" ,
        "Flash memory support",
        "Flash memory support",
        "Debug helper",
        "Debug helper",
        "XMEGA support",
        "XMEGA support",
        "High speed FPGA configuration",
        "High speed FPGA configuration",
        "MAC EEPROM read/write"
        "MAC EEPROM read/write",
 
        "Multi FPGA Support"
    };
    };
 
 
 
    /** * Enables extra FPGA configuration checks. Certain Bistream settings may cause false warnings.  */
 
    public boolean enableExtraFpgaConfigurationChecks = false;
 
 
    private boolean fpgaConfigured = false;
    private boolean fpgaConfigured = false;
    private int fpgaChecksum = 0;
    private int fpgaChecksum = 0;
    private int fpgaBytes = 0;
    private int fpgaBytes = 0;
    private int fpgaInitB = 0;
    private int fpgaInitB = 0;
    private int fpgaFlashResult = 255;
    private int fpgaFlashResult = 255;
Line 514... Line 599...
    /** * Signals an address error (invalid address or wrong page size). */
    /** * Signals an address error (invalid address or wrong page size). */
    public static final int XMEGA_EC_ADDRESS_ERROR = 4;
    public static final int XMEGA_EC_ADDRESS_ERROR = 4;
    /** * Signals that the NVM is busy. */
    /** * Signals that the NVM is busy. */
    public static final int XMEGA_EC_NVM_BUSY = 5;
    public static final int XMEGA_EC_NVM_BUSY = 5;
 
 
 
    private int numberOfFpgas = -1;
 
    private int selectedFpga = -1;
 
    private boolean parallelConfigSupport = false;
 
 
// ******* Ztex1v1 *************************************************************
// ******* Ztex1v1 *************************************************************
/**
/**
  * Constructs an instance from a given device.
  * Constructs an instance from a given device.
  * @param pDev The given device.
  * @param pDev The given device.
Line 813... Line 901...
                }
                }
 
 
                getFpgaState();
                getFpgaState();
//              System.err.println("fpgaConfigred=" + fpgaConfigured + "   fpgaBytes="+fpgaBytes + " ("+bs+")   fpgaChecksum="+fpgaChecksum + " ("+cs+")   fpgaInitB="+fpgaInitB );
//              System.err.println("fpgaConfigred=" + fpgaConfigured + "   fpgaBytes="+fpgaBytes + " ("+bs+")   fpgaChecksum="+fpgaChecksum + " ("+cs+")   fpgaInitB="+fpgaInitB );
                if ( ! fpgaConfigured ) {
                if ( ! fpgaConfigured ) {
                    throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high (size=" + fpgaBytes + " ,  " + (bs - fpgaBytes) + " bytes went lost;  checksum="
                    throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high (size=" + fpgaBytes + " ,  " + (bs - fpgaBytes) + " bytes got lost;  checksum="
                        + fpgaChecksum + " , should be " + cs + ";  INIT_B_HIST=" + fpgaInitB +")" );
                        + fpgaChecksum + " , should be " + cs + ";  INIT_B_HIST=" + fpgaInitB +")" );
                }
                }
//              System.out.println( "FPGA configuration: size=" + fpgaBytes + " ,  " + (bs - fpgaBytes) + " bytes went lost;  checksum=" + fpgaChecksum + " , should be " + cs + ";  INIT_B_HIST=" + fpgaInitB );
                if ( enableExtraFpgaConfigurationChecks ) {
 
                    if ( fpgaBytes!=0 && fpgaBytes!=bs )
 
                        System.err.println("Warning: Possible FPGA configuration data loss: " + (bs - fpgaBytes) + " bytes got lost");
 
                    if ( fpgaInitB!=222 )
 
                        System.err.println("Warning: Possible Bitstream CRC error: INIT_B_HIST=" + fpgaInitB );
 
                }
 
//              System.out.println( "FPGA configuration: size=" + fpgaBytes + " ,  " + (bs - fpgaBytes) + " bytes got lost;  checksum=" + fpgaChecksum + " , should be " + cs + ";  INIT_B_HIST=" + fpgaInitB );
 
 
                tries = 0;
                tries = 0;
                t0 += new Date().getTime();
                t0 += new Date().getTime();
 
 
            }
            }
Line 831... Line 925...
                    throw e;
                    throw e;
            }
            }
        }
        }
 
 
        try {
        try {
            Thread.sleep( 200 );
            Thread.sleep( 100 );
        }
        }
        catch ( InterruptedException e) {
        catch ( InterruptedException e) {
        }
        }
 
 
        return t0;
        return t0;
Line 1088... Line 1182...
            try {
            try {
                eepromWrite(0, buf, 1);
                eepromWrite(0, buf, 1);
 
 
                eepromRead(0, buf, 1);
                eepromRead(0, buf, 1);
                if ( buf[0] != 0 )
                if ( buf[0] != 0 )
                    throw new FirmwareUploadException("Error disabeling EEPROM firmware: Verification failed");
                    throw new FirmwareUploadException("Error disabling EEPROM firmware: Verification failed");
                tries = 0;
                tries = 0;
 
 
            }
            }
            catch ( Exception e ) {
            catch ( Exception e ) {
                if ( tries > 1 ) {
                if ( tries > 1 ) {
Line 2174... Line 2268...
  * @throws InvalidFirmwareException if interface 1 is not supported.
  * @throws InvalidFirmwareException if interface 1 is not supported.
  * @throws UsbException if a communication error occurs.
  * @throws UsbException if a communication error occurs.
  * @throws CapabilityException if FPGA configuration is not supported by the firmware.
  * @throws CapabilityException if FPGA configuration is not supported by the firmware.
  */
  */
    public long configureFpgaHS ( String fwFileName, boolean force, int bs ) throws BitstreamReadException, UsbException, BitstreamUploadException, AlreadyConfiguredException, InvalidFirmwareException, CapabilityException {
    public long configureFpgaHS ( String fwFileName, boolean force, int bs ) throws BitstreamReadException, UsbException, BitstreamUploadException, AlreadyConfiguredException, InvalidFirmwareException, CapabilityException {
        final int transactionBytes = 65536;
        final int transactionBytes = 16384;
        long t0 = 0;
        long t0 = 0;
        byte[] settings = new byte[2];
        byte[] settings = new byte[2];
        boolean releaseIF;
        boolean releaseIF;
 
 
        checkCapability(CAPABILITY_HS_FPGA);
        checkCapability(CAPABILITY_HS_FPGA);
Line 2228... Line 2322...
        if ( bs<0 || bs>1 )
        if ( bs<0 || bs>1 )
            bs = detectBitstreamBitOrder ( buffer[0] );
            bs = detectBitstreamBitOrder ( buffer[0] );
        if ( bs == 1 )
        if ( bs == 1 )
            swapBits(buffer,size);
            swapBits(buffer,size);
 
 
 
// remove NOP's from the end
 
/*      System.out.println(size);
 
        while ( size-2>=0 && buffer[(size-2) / transactionBytes][(size-2) % transactionBytes] == 4 && buffer[(size-1) / transactionBytes][(size-1) % transactionBytes]==0 )
 
            size-=2;
 
        System.out.println(size);
 
*/
 
 
// claim interface if required
// claim interface if required
        if ( releaseIF ) claimInterface( settings[1] & 255 );
        if ( releaseIF ) claimInterface( settings[1] & 255 );
 
 
//      System.out.println(size & 127);
//      System.out.println(size & 127);
 
 
// upload the Bitstream file    
// upload the Bitstream file    
        for ( int tries=1; tries>0; tries-- ) {
        for ( int tries=3; tries>0; tries-- ) {
 
 
            vendorCommand(0x34, "initHSFPGAConfiguration" );
            vendorCommand(0x34, "initHSFPGAConfiguration" );
 
 
            try {
            try {
                t0 = -new Date().getTime();
                t0 = -new Date().getTime();
Line 2247... Line 2347...
                for ( int i=0; i<buffer.length && i*transactionBytes < size; i++ ) {
                for ( int i=0; i<buffer.length && i*transactionBytes < size; i++ ) {
                    int j = size-i*transactionBytes;
                    int j = size-i*transactionBytes;
                    if (j>transactionBytes)
                    if (j>transactionBytes)
                        j = transactionBytes;
                        j = transactionBytes;
 
 
 
                    if ( j>0 ) {
                    int l = LibusbJava.usb_bulk_write(handle(), settings[0] & 255, buffer[i], j, 1000);
                    int l = LibusbJava.usb_bulk_write(handle(), settings[0] & 255, buffer[i], j, 1000);
                    if ( l < 0 )
                    if ( l < 0 )
                        throw new UsbException("Error sending Bitstream: " + LibusbJava.usb_strerror());
                            throw new UsbException("Error sending Bitstream: " + l + ": " + LibusbJava.usb_strerror());
                    else if ( l != j )
                    else if ( l != j )
                        throw new UsbException("Error sending Bitstream: Sent " + l +" of " + j + " bytes");
                        throw new UsbException("Error sending Bitstream: Sent " + l +" of " + j + " bytes");
                }
                }
 
                }
 
 
 
                try {
 
                    Thread.sleep( (size % transactionBytes) / 1000 + 10 );
 
                }
 
                catch ( InterruptedException e) {
 
                }
 
 
                vendorCommand(0x35, "finishHSFPGAConfiguration" );
                vendorCommand(0x35, "finishHSFPGAConfiguration" );
                t0 += new Date().getTime();
                t0 += new Date().getTime();
 
 
                getFpgaState();
                getFpgaState();
//              System.err.println("fpgaConfigred=" + fpgaConfigured +"  fpgaInitB="+fpgaInitB + "  time=" + t0);
//              System.err.println("fpgaConfigred=" + fpgaConfigured + "   fpgaBytes="+fpgaBytes + " ("+size+")   fpgaInitB="+fpgaInitB + "  time=" + t0);
                if ( ! fpgaConfigured ) {
                if ( ! fpgaConfigured ) {
                    throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high" );
                    throw new BitstreamUploadException( "FPGA configuration failed: DONE pin does not go high, possible USB transfer errors (INIT_B_HIST=" + fpgaInitB + (fpgaBytes==0 ? "" : "; " + (size - fpgaBytes) + " bytes got lost") + ")" );
 
                }
 
 
 
                if ( enableExtraFpgaConfigurationChecks ) {
 
                    if ( fpgaBytes!=0 && fpgaBytes!=size )
 
                        System.err.println("Warning: Possible FPGA configuration data loss: " + (size - fpgaBytes) + " bytes got lost");
 
                    if ( fpgaInitB!=222 )
 
                        System.err.println("Warning: Possible Bitstream CRC error: INIT_B_HIST=" + fpgaInitB );
                }
                }
 
 
                tries = 0;
                tries = 0;
            }
            }
            catch ( BitstreamUploadException e ) {
            catch ( BitstreamUploadException e ) {
                if ( tries>1 )
                if (tries == 1)
                    System.err.println("Warning: " + e.getLocalizedMessage() +": Retrying it ...");
 
                else
 
                    throw e;
                    throw e;
 
                else if ( tries<3 || enableExtraFpgaConfigurationChecks )
 
                    System.err.println("Warning: " + e.getLocalizedMessage() +": Retrying it ...");
            }
            }
        }
        }
 
 
        if ( releaseIF ) releaseInterface( settings[1] & 255 );
        if ( releaseIF ) releaseInterface( settings[1] & 255 );
 
 
        try {
        try {
            Thread.sleep( 200 );
            Thread.sleep( 25 );
        }
        }
        catch ( InterruptedException e) {
        catch ( InterruptedException e) {
        }
        }
 
 
        return t0;
        return t0;
Line 2411... Line 2526...
        if ( buf.length < 6 )
        if ( buf.length < 6 )
        throw new IndexOutOfBoundsException( "macRead: Buffer smaller than 6 Bytes" );
        throw new IndexOutOfBoundsException( "macRead: Buffer smaller than 6 Bytes" );
        macEepromRead(250, buf, 6);
        macEepromRead(250, buf, 6);
    }
    }
 
 
 
// ******* numberOfFpgas *******************************************************
 
/**
 
  * Returns the number of FPGA's
 
  * @throws InvalidFirmwareException if interface 1 is not supported.
 
  * @throws UsbException if a communication error occurs.
 
  * @return number of FPGA's
 
  */
 
    public int numberOfFpgas ( ) throws UsbException, InvalidFirmwareException {
 
        if ( numberOfFpgas < 0 ) {
 
            try {
 
                byte[] buffer = new byte[3];
 
                checkCapability(CAPABILITY_MULTI_FPGA);
 
                vendorRequest2(0x50, "getMultiFpgaInfo", buffer, 3);
 
                numberOfFpgas = (buffer[0] & 255)+1;
 
                selectedFpga = buffer[1] & 255;
 
                parallelConfigSupport = buffer[2]==1;
 
            }
 
            catch ( CapabilityException e ) {
 
                numberOfFpgas = 1;
 
                selectedFpga = 0;
 
                parallelConfigSupport = false;
 
            }
 
        }
 
        return numberOfFpgas;
 
    }
 
 
 
// ******* selectFpga **********************************************************
 
/**
 
  * Select a FPGA
 
  * @param num FPGA to select. Valid values are 0 to {@link #numberOfFpgas()}-1
 
  * @throws InvalidFirmwareException if interface 1 is not supported.
 
  * @throws UsbException if a communication error occurs.
 
  * @throws IndexOutOfBoundsException If FPGA number is not in range.
 
  */
 
    public void selectFpga ( int num ) throws UsbException, InvalidFirmwareException, IndexOutOfBoundsException {
 
        numberOfFpgas();
 
        if ( num<0 || num>=numberOfFpgas )
 
            throw new IndexOutOfBoundsException( "selectFPGA: Invalid FPGA number" );
 
 
 
        if ( numberOfFpgas != 1 ) {
 
            try {
 
                checkCapability(CAPABILITY_MULTI_FPGA);
 
                vendorCommand( 0x51, "selectFPGA", num, 0);
 
            }
 
            catch ( CapabilityException e ) {
 
                // should'nt occur
 
            }
 
        }
 
        selectedFpga = num;
 
    }
 
 
}
}
 
 
 
 
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