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https://opencores.org/ocsvn/versatile_io/versatile_io/trunk
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SVN_PATH = http://opencores.org/ocsvn/uart16550/uart16550/trunk/rtl/verilog/
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SVN_PATH = http://opencores.org/ocsvn/uart16550/uart16550/trunk/rtl/verilog/
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DEFINE_FILES = uart_defines.v
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DEFINE_FILES = uart_defines.v
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DEFINE_FILES += timescale.v
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DEFINE_FILES += timescale.v
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RTL_FILES = raminfr.v
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RTL_FILES = raminfr.v
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RTL_FILES += uart_debug_if.v
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RTL_FILES += uart_debug_if.v
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RTL_FILES += uart_receiver.v
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RTL_FILES += uart_receiver.v
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RTL_FILES += uart_regs.v
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RTL_FILES += uart_regs.v
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RTL_FILES += uart_rfifo.v
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RTL_FILES += uart_rfifo.v
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RTL_FILES += uart_tfifo.v
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RTL_FILES += uart_tfifo.v
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RTL_FILES += uart_sync_flops.v
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RTL_FILES += uart_sync_flops.v
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RTL_FILES += uart_wb.v
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RTL_FILES += uart_wb.v
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RTL_FILES += uart_transmitter.v
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RTL_FILES += uart_transmitter.v
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RTL_FILES += uart_top.v
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RTL_FILES += uart_top.v
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export:
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export:
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echo "Exporting UART 16550\n"
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echo "Exporting UART 16550\n"
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for rtl_file in $(RTL_FILES) ; do \
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for rtl_file in $(RTL_FILES) ; do \
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svn export $(SVN_PATH)$$rtl_file; \
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svn export $(SVN_PATH)$$rtl_file; \
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done
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done
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for define_file in $(DEFINE_FILES) ; do \
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for define_file in $(DEFINE_FILES) ; do \
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svn export $(SVN_PATH)$$define_file ;\
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svn export $(SVN_PATH)$$define_file ;\
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done
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done
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ip:
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ip:
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vppreproc --simple $(RTL_FILES) > uart16550_ip.v
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vppreproc --simple $(RTL_FILES) > uart16550_ip.v
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clean:
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clean:
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rm $(RTL_FILES)
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rm $(RTL_FILES)
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rm $(DEFINE_FILES)
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rm $(DEFINE_FILES)
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rm uart16550_ip.v
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