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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [Makefile] - Diff between revs 40 and 44

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Rev 40 Rev 44
Line 1... Line 1...
VERILOG_FILES = defines.v
VERILOG_FILES = defines.v
VERILOG_FILES += clk_and_reset.v
VERILOG_FILES += clk_and_reset.v
VERILOG_FILES += registers.v
VERILOG_FILES += registers.v
VERILOG_FILES += logic.v
VERILOG_FILES += logic.v
 
VERILOG_FILES += io.v
 
 
VERILOG_FILES_CNT = vl_cnt_bin.v
VERILOG_FILES_CNT = vl_cnt_bin.v
VERILOG_FILES_CNT += vl_cnt_bin_clear.v
VERILOG_FILES_CNT += vl_cnt_bin_clear.v
VERILOG_FILES_CNT += vl_cnt_bin_ce.v
VERILOG_FILES_CNT += vl_cnt_bin_ce.v
VERILOG_FILES_CNT += vl_cnt_bin_ce_clear.v
VERILOG_FILES_CNT += vl_cnt_bin_ce_clear.v

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