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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [defines.v] - Diff between revs 40 and 42

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Rev 40 Rev 42
Line 80... Line 80...
`define SPR
`define SPR
`endif
`endif
`endif
`endif
 
 
`ifdef WB3_ARBITER_TYPE1
`ifdef WB3_ARBITER_TYPE1
 
`ifndef SPR
 
`define SPR
 
`endif
`ifndef MUX_ANDOR
`ifndef MUX_ANDOR
`define MUX_ANDOR
`define MUX_ANDOR
`endif
`endif
`endif
`endif
 
 

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