OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [defines.v] - Diff between revs 43 and 44

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 43 Rev 44
Line 1... Line 1...
`ifndef BASE
`ifndef BASE
`define BASE vl_
`define BASE vl_
`endif
`endif
 
 
 
`ifdef ACTEL
 
`define SYN_KEEP /*synthesis syn_keep = 1*/
 
`endif
 
 
`ifdef ALL
`ifdef ALL
 
 
`define GBUF
`define GBUF
`define SYNC_RST
`define SYNC_RST
`define PLL
`define PLL
Line 57... Line 61...
`define WB3WB3_BRIDGE
`define WB3WB3_BRIDGE
`define WB3_ARBITER_TYPE1
`define WB3_ARBITER_TYPE1
`define WB_BOOT_ROM
`define WB_BOOT_ROM
`define WB_DPRAM
`define WB_DPRAM
 
 
 
`define IO_DFF_OE
 
`define O_DFF
 
 
`endif
`endif
 
 
`ifdef PLL
`ifdef PLL
`ifndef SYNC_RST
`ifndef SYNC_RST
`define SYNC_RST
`define SYNC_RST

powered by: WebSVN 2.1.0

© copyright 1999-2021 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.