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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library_actel.v] - Diff between revs 12 and 13

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Rev 12 Rev 13
Line 1763... Line 1763...
parameter wbs_adr  = 1'b0;
parameter wbs_adr  = 1'b0;
parameter wbs_data = 1'b1;
parameter wbs_data = 1'b1;
parameter wbm_adr0 = 2'b00;
parameter wbm_adr0 = 2'b00;
parameter wbm_adr1 = 2'b01;
parameter wbm_adr1 = 2'b01;
parameter wbm_data = 2'b10;
parameter wbm_data = 2'b10;
reg wbs_we_reg;
 
reg [1:0] wbs_bte_reg;
reg [1:0] wbs_bte_reg;
reg wbs;
reg wbs;
wire wbs_eoc_alert, wbm_eoc_alert;
wire wbs_eoc_alert, wbm_eoc_alert;
reg wbs_eoc, wbm_eoc;
reg wbs_eoc, wbm_eoc;
reg [1:0] wbm;
reg [1:0] wbm;
reg [1:16] wbs_count, wbm_count;
reg [1:16] wbs_count, wbm_count;
reg wbs_ack_o_rd;
 
wire wbs_ack_o_wr;
 
wire [35:0] a_d, a_q, b_d, b_q;
wire [35:0] a_d, a_q, b_d, b_q;
wire a_wr, a_rd, a_fifo_full, a_fifo_empty, b_wr, b_rd, b_fifo_full, b_fifo_empty;
wire a_wr, a_rd, a_fifo_full, a_fifo_empty, b_wr, b_rd, b_fifo_full, b_fifo_empty;
reg a_rd_reg;
reg a_rd_reg;
wire b_rd_adr, b_rd_data;
wire b_rd_adr, b_rd_data;
reg b_rd_data_reg;
reg b_rd_data_reg;
Line 1817... Line 1814...
        a_rd_reg <= a_rd;
        a_rd_reg <= a_rd;
assign wbs_ack_o = a_rd_reg | (a_wr & wbs==wbs_data);
assign wbs_ack_o = a_rd_reg | (a_wr & wbs==wbs_data);
assign wbs_dat_o = a_q[35:4];
assign wbs_dat_o = a_q[35:4];
always @ (posedge wbs_clk or posedge wbs_rst)
always @ (posedge wbs_clk or posedge wbs_rst)
if (wbs_rst)
if (wbs_rst)
        {wbs_we_reg,wbs_bte_reg} <= {1'b0,2'b00};
        wbs_bte_reg <= 2'b00;
else
else
        {wbs_we_reg,wbs_bte_reg} <= {wbs_we_i,wbs_bte_i};
        wbs_bte_reg <= wbs_bte_i;
// wbm FIFO
// wbm FIFO
assign wbm_eoc_alert = (wbm_bte_o==wrap4 & wbm_count[3]) | (wbm_bte_o==wrap8 & wbm_count[7]) | (wbm_bte_o==wrap16 & wbm_count[15]);
assign wbm_eoc_alert = (wbm_bte_o==wrap4 & wbm_count[3]) | (wbm_bte_o==wrap8 & wbm_count[7]) | (wbm_bte_o==wrap16 & wbm_count[15]);
always @ (posedge wbm_clk or posedge wbm_rst)
always @ (posedge wbm_clk or posedge wbm_rst)
if (wbm_rst)
if (wbm_rst)
        wbm_eoc <= 1'b0;
        wbm_eoc <= 1'b0;

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