OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [wb.v] - Diff between revs 70 and 71

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 70 Rev 71
Line 599... Line 599...
input [bw-1:0] wbs_bte_i;
input [bw-1:0] wbs_bte_i;
input [sw-1:0] wbs_sel_i;
input [sw-1:0] wbs_sel_i;
input wbs_we_i, wbs_stb_i, wbs_cyc_i;
input wbs_we_i, wbs_stb_i, wbs_cyc_i;
output [dw-1:0] wbs_dat_o;
output [dw-1:0] wbs_dat_o;
output wbs_ack_o;
output wbs_ack_o;
input wbs_clk, wbs_rst;
input wb_clk, wb_rst;
 
 
wire [sw-1:0] cke;
wire [sw-1:0] cke;
 
 
reg wbs_ack_o;
reg wbs_ack_o;
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.