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[/] [versatile_library/] [trunk/] [sim/] [rtl_sim/] [run/] [Makefile] - Diff between revs 92 and 102

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Rev 92 Rev 102
Line 10... Line 10...
tb_wb_b3_dpram:
tb_wb_b3_dpram:
        vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_DPRAM $(VERILOG_FILES) > wb_b3_dpram.v
        vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_DPRAM $(VERILOG_FILES) > wb_b3_dpram.v
        vlog -reportprogress 300 -work work ./wb_b3_dpram.v
        vlog -reportprogress 300 -work work ./wb_b3_dpram.v
        vlog -reportprogress 300 -work work ./../../../bench/wbm.v
        vlog -reportprogress 300 -work work ./../../../bench/wbm.v
        vlog -reportprogress 300 -work work ./../../../bench/tb_wb_b3_dpram.v
        vlog -reportprogress 300 -work work ./../../../bench/tb_wb_b3_dpram.v
 
 
 
tb_wb_cache:
 
        vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_CACHE +define+WB_RAM +define+RAM_BE $(VERILOG_FILES) > wb_cache.v
 
        vlog -reportprogress 300 -work work ./wb_cache.v
 
        vlog -reportprogress 300 -work work ./../../../bench/wbm.v
 
        vlog -reportprogress 300 -work work ./../../../bench/tb_wb_cache.v

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