----------------------------------------------------------------------
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----------------------------------------------------------------------
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---- ----
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---- ----
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---- VHDL Wishbone TESTBENCH ----
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---- VHDL Wishbone TESTBENCH ----
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---- ----
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---- ----
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---- This file is part of the vhdl_wb_tb project ----
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---- This file is part of the vhdl_wb_tb project ----
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---- http://www.opencores.org/cores/vhdl_wb_tb/ ----
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---- http://www.opencores.org/cores/vhdl_wb_tb/ ----
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---- ----
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---- ----
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---- This file contains the top of the test case module. ----
|
---- This file contains the top of the test case module. ----
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---- It contains only an entity whereas the architecture is ----
|
---- It contains only an entity whereas the architecture is ----
|
---- located in several tc_xxxx files. ----
|
---- located in several tc_xxxx files. ----
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---- Every test case shall have its own tc_xxxx file. Every ----
|
---- Every test case shall have its own tc_xxxx file. Every ----
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---- tc_xxxx file needs to be compiled into the work library and ----
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---- tc_xxxx file needs to be compiled into the work library and ----
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---- simulated independently. Use a script to run all tc_xxx ----
|
---- simulated independently. Use a script to run all tc_xxx ----
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---- files automatically. ----
|
---- files automatically. ----
|
---- ----
|
---- ----
|
---- To Do: ----
|
---- To Do: ----
|
---- - ----
|
---- - ----
|
---- ----
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---- ----
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---- Author(s): ----
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---- Author(s): ----
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---- - Sinx, sinx@opencores.org ----
|
---- - Sinx, sinx@opencores.org ----
|
---- ----
|
---- ----
|
----------------------------------------------------------------------
|
----------------------------------------------------------------------
|
---- SVN information
|
---- SVN information
|
----
|
----
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---- $URL: $
|
---- $URL: file:///svn/vhdl_wb_tb/vhdl_wb_tb/trunk/bench/vhdl/tc_top.vhd $
|
---- $Revision: $
|
---- $Revision: 14 $
|
---- $Date: $
|
---- $Date: 2018-07-22 16:27:41 +0200 (Sun, 22 Jul 2018) $
|
---- $Author: $
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---- $Author: sinx $
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---- $Id: $
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---- $Id: tc_top.vhd 14 2018-07-22 14:27:41Z sinx $
|
----------------------------------------------------------------------
|
----------------------------------------------------------------------
|
---- ----
|
---- ----
|
---- Copyright (C) 2018 Authors and OPENCORES.ORG ----
|
---- Copyright (C) 2018 Authors and OPENCORES.ORG ----
|
---- ----
|
---- ----
|
---- This source file may be used and distributed without ----
|
---- This source file may be used and distributed without ----
|
---- restriction provided that this copyright statement is not ----
|
---- restriction provided that this copyright statement is not ----
|
---- removed from the file and that any derivative work contains ----
|
---- removed from the file and that any derivative work contains ----
|
---- the original copyright notice and the associated disclaimer. ----
|
---- the original copyright notice and the associated disclaimer. ----
|
---- ----
|
---- ----
|
---- This source file is free software; you can redistribute it ----
|
---- This source file is free software; you can redistribute it ----
|
---- and/or modify it under the terms of the GNU Lesser General ----
|
---- and/or modify it under the terms of the GNU Lesser General ----
|
---- Public License as published by the Free Software Foundation; ----
|
---- Public License as published by the Free Software Foundation; ----
|
---- either version 2.1 of the License, or (at your option) any ----
|
---- either version 2.1 of the License, or (at your option) any ----
|
---- later version. ----
|
---- later version. ----
|
---- ----
|
---- ----
|
---- This source is distributed in the hope that it will be ----
|
---- This source is distributed in the hope that it will be ----
|
---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
|
---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
|
---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
|
---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
|
---- PURPOSE. See the GNU Lesser General Public License for more ----
|
---- PURPOSE. See the GNU Lesser General Public License for more ----
|
---- details. ----
|
---- details. ----
|
---- ----
|
---- ----
|
---- You should have received a copy of the GNU Lesser General ----
|
---- You should have received a copy of the GNU Lesser General ----
|
---- Public License along with this source; if not, download it ----
|
---- Public License along with this source; if not, download it ----
|
---- from http://www.opencores.org/lgpl.shtml ----
|
---- from http://www.opencores.org/lgpl.shtml ----
|
---- ----
|
---- ----
|
----------------------------------------------------------------------
|
----------------------------------------------------------------------
|
|
|
-- library -----------------------------------------------------------
|
-- library -----------------------------------------------------------
|
library ieee;
|
library ieee;
|
use ieee.std_logic_1164.all;
|
use ieee.std_logic_1164.all;
|
use ieee.numeric_std.all;
|
use ieee.numeric_std.all;
|
library work;
|
library work;
|
use work.convert_pkg.all;
|
use work.convert_pkg.all;
|
use work.my_project_pkg.all;
|
use work.my_project_pkg.all;
|
use work.wishbone_pkg.all;
|
use work.wishbone_pkg.all;
|
use work.wishbone_bfm_pkg.all;
|
use work.wishbone_bfm_pkg.all;
|
|
|
-- entity ------------------------------------------------------------
|
-- entity ------------------------------------------------------------
|
entity tc_top is
|
entity tc_top is
|
port (
|
port (
|
wb_o : out wishbone_bfm_master_out_t;
|
wb_o : out wishbone_bfm_master_out_t;
|
wb_i : in wishbone_bfm_master_in_t
|
wb_i : in wishbone_bfm_master_in_t
|
);
|
);
|
end entity tc_top;
|
end entity tc_top;
|
----------------------------------------------------------------------
|
----------------------------------------------------------------------
|
---- end of file ----
|
---- end of file ----
|
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