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URL https://opencores.org/ocsvn/wb_async_mem_bridge/wb_async_mem_bridge/trunk

Subversion Repositories wb_async_mem_bridge

[/] [wb_async_mem_bridge/] [trunk/] [src/] [wb_async_mem_sm.v] - Diff between revs 4 and 5

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Rev 4 Rev 5
Line 11... Line 11... 
    parameter DW = 32,
 
    parameter DW = 32,
 
    parameter AW = 32
 
    parameter AW = 32
 
  )
 
  )
 
  (
 
  (
 
    input   [(DW-1):0]  wb_data_i,
 
    input   [(DW-1):0]  wb_data_i,
 
    output  [(DW-1):0]  wb_data_o,
 
 
 
    input   [(AW-1):0]  wb_addr_i,
 
    input   [(AW-1):0]  wb_addr_i,
 
    output  [3:0]       wb_sel_o,
 
 
 
    output              wb_we_o,
 
    output              wb_we_o,
 
    output              wb_cyc_o,
 
    output              wb_cyc_o,
 
    output              wb_stb_o,
 
    output              wb_stb_o,
 
    input               wb_ack_i,
 
    input               wb_ack_i,
 
    input               wb_err_i,
 
    input               wb_err_i,

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