| Line 737... |
Line 737... |
printf OUTFILE "endofburst=%s\n",$endofburst;
|
printf OUTFILE "endofburst=%s\n",$endofburst;
|
printf OUTFILE "dat_size=%s\n",$dat_size;
|
printf OUTFILE "dat_size=%s\n",$dat_size;
|
printf OUTFILE "adr_size=%s\n",$adr_size;
|
printf OUTFILE "adr_size=%s\n",$adr_size;
|
printf OUTFILE "mux_type=%s\n",$mux_type;
|
printf OUTFILE "mux_type=%s\n",$mux_type;
|
printf OUTFILE "interconnect=%s\n",$interconnect;
|
printf OUTFILE "interconnect=%s\n",$interconnect;
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE "\nmaster %s\n",$master[$i]{"wbm"};
|
printf OUTFILE "\nmaster %s\n",$master[$i]{"wbm"};
|
printf OUTFILE " type=%s\n",$master[$i]{"type"};
|
printf OUTFILE " type=%s\n",$master[$i]{"type"};
|
printf OUTFILE " lock_o=%s\n",$master[$i]{"lock_o"};
|
printf OUTFILE " lock_o=%s\n",$master[$i]{"lock_o"};
|
printf OUTFILE " tga_o=%s\n",$master[$i]{"tga_o"};
|
printf OUTFILE " tga_o=%s\n",$master[$i]{"tga_o"};
|
printf OUTFILE " tgc_o=%s\n",$master[$i]{"tgc_o"};
|
printf OUTFILE " tgc_o=%s\n",$master[$i]{"tgc_o"};
|
| Line 749... |
Line 749... |
printf OUTFILE " err_i=%s\n",$master[$i]{"err_i"};
|
printf OUTFILE " err_i=%s\n",$master[$i]{"err_i"};
|
printf OUTFILE " rty_i=%s\n",$master[$i]{"rty_i"};
|
printf OUTFILE " rty_i=%s\n",$master[$i]{"rty_i"};
|
if ($interconnect eq "sharedbus") {
|
if ($interconnect eq "sharedbus") {
|
printf OUTFILE " priority=%s\n",$master[$i]{"priority"};
|
printf OUTFILE " priority=%s\n",$master[$i]{"priority"};
|
} else {
|
} else {
|
for ($j=1; $j le $slaves; $j++) {
|
for ($j=1; $j <= $slaves; $j++) {
|
printf OUTFILE " priority_%s=%s\n",$slave[$j]{"wbs"},$master[$i]{"priority_".($slave[$j]{"wbs"})};
|
printf OUTFILE " priority_%s=%s\n",$slave[$j]{"wbs"},$master[$i]{"priority_".($slave[$j]{"wbs"})};
|
};
|
};
|
};
|
};
|
printf OUTFILE "end master %s\n",$master[$i]{"wbm"};
|
printf OUTFILE "end master %s\n",$master[$i]{"wbm"};
|
};
|
};
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE "\nslave %s\n",$slave[$i]{"wbs"};
|
printf OUTFILE "\nslave %s\n",$slave[$i]{"wbs"};
|
printf OUTFILE " type=%s\n",$slave[$i]{"type"};
|
printf OUTFILE " type=%s\n",$slave[$i]{"type"};
|
printf OUTFILE " adr_i_hi=%s\n",$slave[$i]{"adr_i_hi"};
|
printf OUTFILE " adr_i_hi=%s\n",$slave[$i]{"adr_i_hi"};
|
printf OUTFILE " adr_i_lo=%s\n",$slave[$i]{"adr_i_lo"};
|
printf OUTFILE " adr_i_lo=%s\n",$slave[$i]{"adr_i_lo"};
|
printf OUTFILE " tga_i=%s\n",$slave[$i]{"tga_i"};
|
printf OUTFILE " tga_i=%s\n",$slave[$i]{"tga_i"};
|
| Line 784... |
Line 784... |
printf OUTFILE "%s Generated by PERL program wishbone.pl. Do not edit this file.\n%s\n",$comment,$comment;
|
printf OUTFILE "%s Generated by PERL program wishbone.pl. Do not edit this file.\n%s\n",$comment,$comment;
|
printf OUTFILE "%s For defines see %s\n%s\n",$comment,$infile,$comment;
|
printf OUTFILE "%s For defines see %s\n%s\n",$comment,$infile,$comment;
|
$tmp=localtime(time);
|
$tmp=localtime(time);
|
printf OUTFILE "%s Generated %s\n%s\n",$comment,$tmp,$comment;
|
printf OUTFILE "%s Generated %s\n%s\n",$comment,$tmp,$comment;
|
printf OUTFILE "%s Wishbone masters:\n",$comment;
|
printf OUTFILE "%s Wishbone masters:\n",$comment;
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE "%s %s\n",$comment,$master[$i]{"wbm"}; };
|
printf OUTFILE "%s %s\n",$comment,$master[$i]{"wbm"}; };
|
printf OUTFILE "%s\n%s Wishbone slaves:\n",$comment,$comment;
|
printf OUTFILE "%s\n%s Wishbone slaves:\n",$comment,$comment;
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE "%s %s\n",$comment,$slave[$i]{"wbs"};
|
printf OUTFILE "%s %s\n",$comment,$slave[$i]{"wbs"};
|
if ($slave[$i]{"size"} ne ffffffff) {
|
if (hex($slave[$i]{"size"}) != hex(ffffffff)) {
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr"},$slave[$i]{"size"}};
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr"},$slave[$i]{"size"}};
|
if ($slave[$i]{"size1"} ne ffffffff) {
|
if (hex($slave[$i]{"size1"}) != hex(ffffffff)) {
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr1"},$slave[$i]{"size1"}};
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr1"},$slave[$i]{"size1"}};
|
if ($slave[$i]{"size2"} ne ffffffff) {
|
if (hex($slave[$i]{"size2"}) != hex(ffffffff)) {
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr2"},$slave[$i]{"size2"}};
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr2"},$slave[$i]{"size2"}};
|
if ($slave[$i]{"size3"} ne ffffffff) {
|
if (hex($slave[$i]{"size3"}) != hex(ffffffff)) {
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr3"},$slave[$i]{"size3"}};
|
printf OUTFILE "%s baseadr 0x%s - size 0x%s\n",$comment,$slave[$i]{"baseadr3"},$slave[$i]{"size3"}};
|
};
|
};
|
};
|
};
|
|
|
sub gen_vhdl_package {
|
sub gen_vhdl_package {
|
| Line 807... |
Line 807... |
printf OUTFILE "library IEEE;\nuse IEEE.std_logic_1164.all;\n\n";
|
printf OUTFILE "library IEEE;\nuse IEEE.std_logic_1164.all;\n\n";
|
printf OUTFILE "package %s_package is\n\n",$intercon;
|
printf OUTFILE "package %s_package is\n\n",$intercon;
|
|
|
# records ?
|
# records ?
|
if ($signal_groups eq 1) {
|
if ($signal_groups eq 1) {
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
# input record
|
# input record
|
printf OUTFILE "type %s_wbm_i_type is record\n",$master[$i]{"wbm"};
|
printf OUTFILE "type %s_wbm_i_type is record\n",$master[$i]{"wbm"};
|
if ($master[$i]{"type"} =~ /(ro|rw)/) { printf OUTFILE " dat_i : std_logic_vector(%s downto 0);\n",$master[$i]{"dat_size"}-1;};
|
if ($master[$i]{"type"} =~ /(ro|rw)/) { printf OUTFILE " dat_i : std_logic_vector(%s downto 0);\n",$master[$i]{"dat_size"}-1;};
|
if ($master[$i]{"err_i"} eq 1) { printf OUTFILE " err_i : std_logic;\n";};
|
if ($master[$i]{"err_i"} == 1) { printf OUTFILE " err_i : std_logic;\n";};
|
if ($master[$i]{"rty_i"} eq 1) { printf OUTFILE " rty_i : std_logic;\n";};
|
if ($master[$i]{"rty_i"} == 1) { printf OUTFILE " rty_i : std_logic;\n";};
|
printf OUTFILE " ack_i : std_logic;\n";
|
printf OUTFILE " ack_i : std_logic;\n";
|
printf OUTFILE "end record;\n";
|
printf OUTFILE "end record;\n";
|
# output record
|
# output record
|
printf OUTFILE "type %s_wbm_o_type is record\n",$master[$i]{"wbm"};
|
printf OUTFILE "type %s_wbm_o_type is record\n",$master[$i]{"wbm"};
|
if ($master[$i]{"type"} =~ /(wo|rw)/) {
|
if ($master[$i]{"type"} =~ /(wo|rw)/) {
|
printf OUTFILE " dat_o : std_logic_vector(%s downto 0);\n",$master[$i]{"dat_size"}-1;
|
printf OUTFILE " dat_o : std_logic_vector(%s downto 0);\n",$master[$i]{"dat_size"}-1;
|
printf OUTFILE " we_o : std_logic;\n"; };
|
printf OUTFILE " we_o : std_logic;\n"; };
|
if ($dat_size eq 8) {
|
if ($dat_size == 8) {
|
printf OUTFILE " sel_o : std_logic;\n";
|
printf OUTFILE " sel_o : std_logic;\n";
|
} else {
|
} else {
|
printf OUTFILE " sel_o : std_logic_vector(%s downto 0);\n",$dat_size/8-1; };
|
printf OUTFILE " sel_o : std_logic_vector(%s downto 0);\n",$dat_size/8-1; };
|
printf OUTFILE " adr_o : std_logic_vector(%s downto 0);\n",$adr_size-1;
|
printf OUTFILE " adr_o : std_logic_vector(%s downto 0);\n",$adr_size-1;
|
if ($master[$i]{"lock_o"} eq 1) { printf OUTFILE " lock_o : std_logic;\n";};
|
if ($master[$i]{"lock_o"} == 1) { printf OUTFILE " lock_o : std_logic;\n";};
|
if ($master[$i]{"tga_o"} eq 1) { printf OUTFILE " %s_o : std_logic_vector(%s downto 0);\n",$rename_tga, $tga_bits-1;};
|
if ($master[$i]{"tga_o"} == 1) { printf OUTFILE " %s_o : std_logic_vector(%s downto 0);\n",$rename_tga, $tga_bits-1;};
|
if ($master[$i]{"tgc_o"} eq 1) { printf OUTFILE " %s_o : std_logic_vector(%s downto 0);\n",$rename_tgc, $tgc_bits-1;};
|
if ($master[$i]{"tgc_o"} == 1) { printf OUTFILE " %s_o : std_logic_vector(%s downto 0);\n",$rename_tgc, $tgc_bits-1;};
|
printf OUTFILE " cyc_o : std_logic;\n";
|
printf OUTFILE " cyc_o : std_logic;\n";
|
printf OUTFILE " stb_o : std_logic;\n";
|
printf OUTFILE " stb_o : std_logic;\n";
|
printf OUTFILE "end record;\n\n";
|
printf OUTFILE "end record;\n\n";
|
}; #end for
|
}; #end for
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
# input record
|
# input record
|
printf OUTFILE "type %s_wbs_i_type is record\n",$slave[$i]{"wbs"};
|
printf OUTFILE "type %s_wbs_i_type is record\n",$slave[$i]{"wbs"};
|
if ($slave[$i]{"type"} ne "ro") {
|
if ($slave[$i]{"type"} ne "ro") {
|
printf OUTFILE " dat_i : std_logic_vector(%s downto 0);\n",$slave[$i]{"dat_size"}-1;
|
printf OUTFILE " dat_i : std_logic_vector(%s downto 0);\n",$slave[$i]{"dat_size"}-1;
|
printf OUTFILE " we_i : std_logic;\n"; };
|
printf OUTFILE " we_i : std_logic;\n"; };
|
if ($dat_size eq 8) {
|
if ($dat_size == 8) {
|
printf OUTFILE " sel_i : std_logic;\n";
|
printf OUTFILE " sel_i : std_logic;\n";
|
} else {
|
} else {
|
printf OUTFILE " sel_i : std_logic_vector(%s downto 0);\n",$dat_size/8-1; };
|
printf OUTFILE " sel_i : std_logic_vector(%s downto 0);\n",$dat_size/8-1; };
|
if ($slave[$i]{"adr_i_hi"} gt 0) { printf OUTFILE " adr_i : std_logic_vector(%s downto %s);\n",$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"};};
|
if ($slave[$i]{"adr_i_hi"} > 0) { printf OUTFILE " adr_i : std_logic_vector(%s downto %s);\n",$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"};};
|
if ($slave[$i]{"tga_i"} eq 1) { printf OUTFILE " %s_i : std_logic_vector(%s downto 0);\n",$rename_tga,$tga_bits-1; };
|
if ($slave[$i]{"tga_i"} == 1) { printf OUTFILE " %s_i : std_logic_vector(%s downto 0);\n",$rename_tga,$tga_bits-1; };
|
if ($slave[$i]{"tgc_i"} eq 1) { printf OUTFILE " %s_i : std_logic_vector(%s downto 0);\n",$rename_tgc,$tgc_bits-1; };
|
if ($slave[$i]{"tgc_i"} == 1) { printf OUTFILE " %s_i : std_logic_vector(%s downto 0);\n",$rename_tgc,$tgc_bits-1; };
|
printf OUTFILE " cyc_i : std_logic;\n";
|
printf OUTFILE " cyc_i : std_logic;\n";
|
printf OUTFILE " stb_i : std_logic;\n";
|
printf OUTFILE " stb_i : std_logic;\n";
|
printf OUTFILE "end record;\n";
|
printf OUTFILE "end record;\n";
|
# output record
|
# output record
|
printf OUTFILE "type %s_wbs_o_type is record\n",$slave[$i]{"wbs"};
|
printf OUTFILE "type %s_wbs_o_type is record\n",$slave[$i]{"wbs"};
|
if ($slave[$i]{"type"} =~ /(ro|rw)/) { printf OUTFILE " dat_o : std_logic_vector(%s downto 0);\n",$slave[$i]{"dat_size"}-1 };
|
if ($slave[$i]{"type"} =~ /(ro|rw)/) { printf OUTFILE " dat_o : std_logic_vector(%s downto 0);\n",$slave[$i]{"dat_size"}-1 };
|
if ($slave[$i]{"rty_o"} eq 1) { printf OUTFILE " rty_o : std_logic;\n" };
|
if ($slave[$i]{"rty_o"} == 1) { printf OUTFILE " rty_o : std_logic;\n" };
|
if ($slave[$i]{"err_o"} eq 1) { printf OUTFILE " err_o : std_logic;\n" };
|
if ($slave[$i]{"err_o"} == 1) { printf OUTFILE " err_o : std_logic;\n" };
|
printf OUTFILE " ack_o : std_logic;\n";
|
printf OUTFILE " ack_o : std_logic;\n";
|
printf OUTFILE "end record;\n";
|
printf OUTFILE "end record;\n";
|
}; #end for
|
}; #end for
|
}; #end if signal groups
|
}; #end if signal groups
|
|
|
| Line 1026... |
Line 1026... |
printf OUTFILE "\nentity %s is\n port (\n",$intercon;
|
printf OUTFILE "\nentity %s is\n port (\n",$intercon;
|
# records
|
# records
|
if ($signal_groups eq 1) {
|
if ($signal_groups eq 1) {
|
# master port(s)
|
# master port(s)
|
printf OUTFILE " -- wishbone master port(s)\n";
|
printf OUTFILE " -- wishbone master port(s)\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE " -- %s\n",$master[$i]{"wbm"};
|
printf OUTFILE " -- %s\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_wbm_i : out %s_wbm_i_type;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " %s_wbm_i : out %s_wbm_i_type;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " %s_wbm_o : in %s_wbm_o_type;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " %s_wbm_o : in %s_wbm_o_type;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
}; #end for
|
}; #end for
|
# slave port(s)
|
# slave port(s)
|
printf OUTFILE " -- wishbone slave port(s)\n";
|
printf OUTFILE " -- wishbone slave port(s)\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE " -- %s\n",$slave[$i]{"wbs"};
|
printf OUTFILE " -- %s\n",$slave[$i]{"wbs"};
|
printf OUTFILE " %s_wbs_i : out %s_wbs_i_type;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE " %s_wbs_i : out %s_wbs_i_type;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE " %s_wbs_o : in %s_wbs_o_type;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE " %s_wbs_o : in %s_wbs_o_type;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
};
|
};
|
# separate signals
|
# separate signals
|
} else {
|
} else {
|
printf OUTFILE " -- wishbone master port(s)\n";
|
printf OUTFILE " -- wishbone master port(s)\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE " -- %s\n",$master[$i]{"wbm"};
|
printf OUTFILE " -- %s\n",$master[$i]{"wbm"};
|
if ($master[$i]{"type"} ne "wo") {
|
if ($master[$i]{"type"} ne "wo") {
|
printf OUTFILE " %s_dat_i : out std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$dat_size-1; };
|
printf OUTFILE " %s_dat_i : out std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$dat_size-1; };
|
printf OUTFILE " %s_ack_i : out std_logic;\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_ack_i : out std_logic;\n",$master[$i]{"wbm"};
|
if ($master[$i]{"err_i"} eq 1) {
|
if ($master[$i]{"err_i"} eq 1) {
|
| Line 1054... |
Line 1054... |
printf OUTFILE " %s_rty_i : out std_logic;\n",$master[$i]{"wbm"}; };
|
printf OUTFILE " %s_rty_i : out std_logic;\n",$master[$i]{"wbm"}; };
|
if ($master[$i]{"type"} ne "ro") {
|
if ($master[$i]{"type"} ne "ro") {
|
printf OUTFILE " %s_dat_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$dat_size-1;
|
printf OUTFILE " %s_dat_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$dat_size-1;
|
printf OUTFILE " %s_we_o : in std_logic;\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_we_o : in std_logic;\n",$master[$i]{"wbm"};
|
};
|
};
|
if ($dat_size ge 16) {
|
if ($dat_size >= 16) {
|
printf OUTFILE " %s_sel_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$dat_size/8-1; };
|
printf OUTFILE " %s_sel_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$dat_size/8-1; };
|
printf OUTFILE " %s_adr_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$adr_size-1;
|
printf OUTFILE " %s_adr_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$adr_size-1;
|
if ($master[$i]{"tgc_o"} eq 1) {
|
if ($master[$i]{"tgc_o"} eq 1) {
|
printf OUTFILE " %s_%s_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$rename_tgc,$tgc_bits-1; };
|
printf OUTFILE " %s_%s_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$rename_tgc,$tgc_bits-1; };
|
if ($master[$i]{"tga_o"} eq 1) {
|
if ($master[$i]{"tga_o"} eq 1) {
|
printf OUTFILE " %s_%s_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$rename_tga,$tga_bits-1; };
|
printf OUTFILE " %s_%s_o : in std_logic_vector(%s downto 0);\n",$master[$i]{"wbm"},$rename_tga,$tga_bits-1; };
|
printf OUTFILE " %s_cyc_o : in std_logic;\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_cyc_o : in std_logic;\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_stb_o : in std_logic;\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_stb_o : in std_logic;\n",$master[$i]{"wbm"};
|
};
|
};
|
printf OUTFILE " -- wishbone slave port(s)\n";
|
printf OUTFILE " -- wishbone slave port(s)\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE " -- %s\n",$slave[$i]{"wbs"};
|
printf OUTFILE " -- %s\n",$slave[$i]{"wbs"};
|
if ($slave[$i]{"type"} ne "wo") {
|
if ($slave[$i]{"type"} ne "wo") {
|
printf OUTFILE " %s_dat_o : in std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$dat_size-1; };
|
printf OUTFILE " %s_dat_o : in std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$dat_size-1; };
|
printf OUTFILE " %s_ack_o : in std_logic;\n",$slave[$i]{"wbs"};
|
printf OUTFILE " %s_ack_o : in std_logic;\n",$slave[$i]{"wbs"};
|
if ($slave[$i]{"err_o"} eq 1) {
|
if ($slave[$i]{"err_o"} eq 1) {
|
| Line 1078... |
Line 1078... |
printf OUTFILE " %s_rty_o : in std_logic;\n",$slave[$i]{"wbs"}; };
|
printf OUTFILE " %s_rty_o : in std_logic;\n",$slave[$i]{"wbs"}; };
|
if ($slave[$i]{"type"} ne "ro") {
|
if ($slave[$i]{"type"} ne "ro") {
|
printf OUTFILE " %s_dat_i : out std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$dat_size-1;
|
printf OUTFILE " %s_dat_i : out std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$dat_size-1;
|
printf OUTFILE " %s_we_i : out std_logic;\n",$slave[$i]{"wbs"};
|
printf OUTFILE " %s_we_i : out std_logic;\n",$slave[$i]{"wbs"};
|
};
|
};
|
if ($dat_size ge 16) {
|
if ($dat_size >= 16) {
|
printf OUTFILE " %s_sel_i : out std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$dat_size/8-1; };
|
printf OUTFILE " %s_sel_i : out std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$dat_size/8-1; };
|
printf OUTFILE " %s_adr_i : out std_logic_vector(%s downto %s);\n",$slave[$i]{"wbs"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"};
|
printf OUTFILE " %s_adr_i : out std_logic_vector(%s downto %s);\n",$slave[$i]{"wbs"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"};
|
if ($slave[$i]{"tgc_i"} eq 1) {
|
if ($slave[$i]{"tgc_i"} eq 1) {
|
printf OUTFILE " %s_%s_i : out std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$rename_tgc,$tgc_bits-1; };
|
printf OUTFILE " %s_%s_i : out std_logic_vector(%s downto 0);\n",$slave[$i]{"wbs"},$rename_tgc,$tgc_bits-1; };
|
if ($slave[$i]{"tga_i"} eq 1) {
|
if ($slave[$i]{"tga_i"} eq 1) {
|
| Line 1100... |
Line 1100... |
|
|
|
|
# generate signals for remapping (for records)
|
# generate signals for remapping (for records)
|
sub gen_sig_remap {
|
sub gen_sig_remap {
|
sub gen_sig_dec {
|
sub gen_sig_dec {
|
if ($_[1] gt 0) {
|
if ($_[1] > 0) {
|
printf OUTFILE " signal %s : std_logic_vector(%s downto %s);\n",$_[0],$_[1]-1,$_[2];
|
printf OUTFILE " signal %s : std_logic_vector(%s downto %s);\n",$_[0],$_[1]-1,$_[2];
|
} else {
|
} else {
|
printf OUTFILE " signal %s : std_logic;\n",$_[0];
|
printf OUTFILE " signal %s : std_logic;\n",$_[0];
|
};
|
};
|
};
|
};
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"type"} ne "wo") {
|
if ($master[$i]{"type"} ne "wo") {
|
gen_sig_dec($master[$i]{"wbm"}.'_dat_i',$dat_size,0); };
|
gen_sig_dec($master[$i]{"wbm"}.'_dat_i',$dat_size,0); };
|
gen_sig_dec($master[$i]{"wbm"}.'_ack_i');
|
gen_sig_dec($master[$i]{"wbm"}.'_ack_i');
|
if ($master[$i]{"err_i"} eq 1) {
|
if ($master[$i]{"err_i"} eq 1) {
|
gen_sig_dec($master[$i]{"wbm"}.'_err_i'); };
|
gen_sig_dec($master[$i]{"wbm"}.'_err_i'); };
|
| Line 1130... |
Line 1130... |
if ($master[$i]{"tgd_o"} eq 1) {
|
if ($master[$i]{"tgd_o"} eq 1) {
|
gen_sig_dec($master[$i]{"wbm"}.'_'.$rename_tgd.'_o',$tgd_bits,0); };
|
gen_sig_dec($master[$i]{"wbm"}.'_'.$rename_tgd.'_o',$tgd_bits,0); };
|
gen_sig_dec($master[$i]{"wbm"}.'_cyc_o');
|
gen_sig_dec($master[$i]{"wbm"}.'_cyc_o');
|
gen_sig_dec($master[$i]{"wbm"}.'_stb_o');
|
gen_sig_dec($master[$i]{"wbm"}.'_stb_o');
|
};
|
};
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"type"} ne "wo") {
|
if ($slave[$i]{"type"} ne "wo") {
|
gen_sig_dec($slave[$i]{"wbs"}.'_dat_o',$dat_size,0); };
|
gen_sig_dec($slave[$i]{"wbs"}.'_dat_o',$dat_size,0); };
|
gen_sig_dec($slave[$i]{"wbs"}.'_ack_o');
|
gen_sig_dec($slave[$i]{"wbs"}.'_ack_o');
|
if ($slave[$i]{"err_o"} eq 1) {
|
if ($slave[$i]{"err_o"} eq 1) {
|
gen_sig_dec($slave[$i]{"wbs"}.'_err_o'); };
|
gen_sig_dec($slave[$i]{"wbs"}.'_err_o'); };
|
| Line 1160... |
Line 1160... |
|
|
sub gen_global_signals {
|
sub gen_global_signals {
|
# single master
|
# single master
|
if ($masters eq 1) {
|
if ($masters eq 1) {
|
# slave select for generation of stb_i to slaves
|
# slave select for generation of stb_i to slaves
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE " signal %s_ss : std_logic; -- slave select\n",$slave[$i]{"wbs"}; };
|
printf OUTFILE " signal %s_ss : std_logic; -- slave select\n",$slave[$i]{"wbs"}; };
|
# shared bus
|
# shared bus
|
} elsif ($interconnect eq "sharedbus") {
|
} elsif ($interconnect eq "sharedbus") {
|
# bus grant
|
# bus grant
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE " signal %s_bg : std_logic; -- bus grant\n",$master[$i]{"wbm"}; };
|
printf OUTFILE " signal %s_bg : std_logic; -- bus grant\n",$master[$i]{"wbm"}; };
|
# slave select for generation of stb_i to slaves
|
# slave select for generation of stb_i to slaves
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE " signal %s_ss : std_logic; -- slave select\n",$slave[$i]{"wbs"}; };
|
printf OUTFILE " signal %s_ss : std_logic; -- slave select\n",$slave[$i]{"wbs"}; };
|
# crossbarswitch
|
# crossbarswitch
|
} else {
|
} else {
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
for ($j=1; $j le $slaves; $j++) {
|
for ($j=1; $j <= $slaves; $j++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE " signal %s_%s_ss : std_logic; -- slave select\n",$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " signal %s_%s_ss : std_logic; -- slave select\n",$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " signal %s_%s_bg : std_logic; -- bus grant\n",$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " signal %s_%s_bg : std_logic; -- bus grant\n",$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
};
|
};
|
| Line 1192... |
Line 1192... |
# cyc_i
|
# cyc_i
|
# printf OUTFILE "%s_bg <= %s_cyc_o;\n",$master[1]{"wbm"},$master[1]{"wbm"};
|
# printf OUTFILE "%s_bg <= %s_cyc_o;\n",$master[1]{"wbm"},$master[1]{"wbm"};
|
# sharedbus
|
# sharedbus
|
} elsif ($interconnect eq "sharedbus") {
|
} elsif ($interconnect eq "sharedbus") {
|
printf OUTFILE "arbiter_sharedbus: block\n";
|
printf OUTFILE "arbiter_sharedbus: block\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE " signal %s_bg_1, %s_bg_2, %s_bg_q : std_logic;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE " signal %s_bg_1, %s_bg_2, %s_bg_q : std_logic;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE " signal %s_trafic_ctrl_limit : std_logic;\n",$master[$i]{"wbm"}; };
|
printf OUTFILE " signal %s_trafic_ctrl_limit : std_logic;\n",$master[$i]{"wbm"}; };
|
printf OUTFILE " signal ack, ce, idle :std_logic;\n";
|
printf OUTFILE " signal ack, ce, idle :std_logic;\n";
|
printf OUTFILE "begin -- arbiter\n";
|
printf OUTFILE "begin -- arbiter\n";
|
printf OUTFILE "ack <= %s_ack_o",$slave[1]{"wbs"};
|
printf OUTFILE "ack <= %s_ack_o",$slave[1]{"wbs"};
|
for ($i=2; $i le $slaves; $i++) {
|
for ($i=2; $i <= $slaves; $i++) {
|
printf OUTFILE " or %s_ack_o",$slave[$i]{"wbs"}; };
|
printf OUTFILE " or %s_ack_o",$slave[$i]{"wbs"}; };
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
# instantiate trafic_supervision(s)
|
# instantiate trafic_supervision(s)
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE "\ntrafic_supervision_%s : entity work.trafic_supervision\n",$i;
|
printf OUTFILE "\ntrafic_supervision_%s : entity work.trafic_supervision\n",$i;
|
printf OUTFILE "generic map(\n";
|
printf OUTFILE "generic map(\n";
|
printf OUTFILE " priority => %s,\n",$master[$i]{"priority"};
|
printf OUTFILE " priority => %s,\n",$master[$i]{"priority"};
|
printf OUTFILE " tot_priority => %s)\n",$priority;
|
printf OUTFILE " tot_priority => %s)\n",$priority;
|
printf OUTFILE "port map(\n";
|
printf OUTFILE "port map(\n";
|
| Line 1217... |
Line 1217... |
printf OUTFILE " clk => clk,\n";
|
printf OUTFILE " clk => clk,\n";
|
printf OUTFILE " reset => reset);\n"; };
|
printf OUTFILE " reset => reset);\n"; };
|
# _bg_q
|
# _bg_q
|
# bg eq 1 => set
|
# bg eq 1 => set
|
# end of cycle => reset
|
# end of cycle => reset
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE "\nprocess(clk,reset)\nbegin\nif reset='1' then\n";
|
printf OUTFILE "\nprocess(clk,reset)\nbegin\nif reset='1' then\n";
|
printf OUTFILE " %s_bg_q <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_bg_q <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE "elsif clk'event and clk='1' then\n";
|
printf OUTFILE "elsif clk'event and clk='1' then\n";
|
printf OUTFILE "if %s_bg_q='0' then\n",$master[$i]{"wbm"};
|
printf OUTFILE "if %s_bg_q='0' then\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_bg_q <= %s_bg;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " %s_bg_q <= %s_bg;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "elsif ack='1'";
|
printf OUTFILE "elsif ack='1'";
|
if ($master[$i]{"tgc_o"} eq 1) {
|
if ($master[$i]{"tgc_o"} == 1) {
|
printf OUTFILE " and (%s_%s_o=\"%s\" or %s_%s_o=\"%s\")",$master[$i]{"wbm"},$rename_tgc,$classic,$master[$i]{"wbm"},$rename_tgc,$endofburst; };
|
printf OUTFILE " and (%s_%s_o=\"%s\" or %s_%s_o=\"%s\")",$master[$i]{"wbm"},$rename_tgc,$classic,$master[$i]{"wbm"},$rename_tgc,$endofburst; };
|
printf OUTFILE " then\n %s_bg_q <= '0';\nend if;\nend if;\nend process;\n",$master[$i]{"wbm"};
|
printf OUTFILE " then\n %s_bg_q <= '0';\nend if;\nend if;\nend process;\n",$master[$i]{"wbm"};
|
}; # end for
|
}; # end for
|
# _bg
|
# _bg
|
printf OUTFILE "\nidle <= '1' when %s_bg_q='0'",$master[1]{"wbm"};
|
printf OUTFILE "\nidle <= '1' when %s_bg_q='0'",$master[1]{"wbm"};
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE " and %s_bg_q='0'",$master[$i]{"wbm"}; };
|
printf OUTFILE " and %s_bg_q='0'",$master[$i]{"wbm"}; };
|
printf OUTFILE " else '0';\n";
|
printf OUTFILE " else '0';\n";
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and %s_cyc_o='1' and %s_trafic_ctrl_limit='0' else '0';\n",$master[1]{"wbm"},$master[1]{"wbm"},$master[1]{"wbm"};
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and %s_cyc_o='1' and %s_trafic_ctrl_limit='0' else '0';\n",$master[1]{"wbm"},$master[1]{"wbm"},$master[1]{"wbm"};
|
$depend = $master[1]{"wbm"}."_bg_1='0'";
|
$depend = $master[1]{"wbm"}."_bg_1='0'";
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and %s_cyc_o='1' and %s_trafic_ctrl_limit='0' and (%s) else '0';\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$depend;
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and %s_cyc_o='1' and %s_trafic_ctrl_limit='0' and (%s) else '0';\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$depend;
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_1='0'";
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_1='0'";
|
};
|
};
|
|
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' else '0';\n",$master[1]{"wbm"},$depend,$master[1]{"wbm"};
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' else '0';\n",$master[1]{"wbm"},$depend,$master[1]{"wbm"};
|
$depend = $depend." and ".$master[1]{"wbm"}."_bg_2='0'";
|
$depend = $depend." and ".$master[1]{"wbm"}."_bg_2='0'";
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' else '0';\n",$master[$i]{"wbm"},$depend,$master[$i]{"wbm"};
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' else '0';\n",$master[$i]{"wbm"},$depend,$master[$i]{"wbm"};
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_2='0'";
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_2='0'";
|
};
|
};
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE "%s_bg <= %s_bg_q or %s_bg_1 or %s_bg_2;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE "%s_bg <= %s_bg_q or %s_bg_1 or %s_bg_2;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
# ce
|
# ce
|
printf OUTFILE "ce <= %s_cyc_o",$master[1]{"wbm"};
|
printf OUTFILE "ce <= %s_cyc_o",$master[1]{"wbm"};
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE " or %s_cyc_o",$master[$i]{"wbm"}; };
|
printf OUTFILE " or %s_cyc_o",$master[$i]{"wbm"}; };
|
printf OUTFILE " when idle='1' else '0';\n\n";
|
printf OUTFILE " when idle='1' else '0';\n\n";
|
# thats it
|
# thats it
|
printf OUTFILE "end block arbiter_sharedbus;\n\n";
|
printf OUTFILE "end block arbiter_sharedbus;\n\n";
|
# interconnect crossbarswitch
|
# interconnect crossbarswitch
|
} else {
|
} else {
|
for ($j=1; $j le $slaves; $j++) {
|
for ($j=1; $j <= $slaves; $j++) {
|
# single master ?
|
# single master ?
|
$tmp=0;
|
$tmp=0;
|
for ($l=1; $l le $masters; $l++) {
|
for ($l=1; $l <= $masters; $l++) {
|
if ($master[$l]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$l]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
$only_master = $l;
|
$only_master = $l;
|
$tmp++;
|
$tmp++;
|
};
|
};
|
};
|
};
|
if ($tmp == 1) {
|
if ($tmp == 1) {
|
printf OUTFILE "%s_%s_bg <= %s_%s_ss and %s_cyc_o;\n",$master[$only_master]{"wbm"},$slave[$j]{"wbs"},$master[$only_master]{"wbm"},$slave[$j]{"wbs"},$master[$only_master]{"wbm"};
|
printf OUTFILE "%s_%s_bg <= %s_%s_ss and %s_cyc_o;\n",$master[$only_master]{"wbm"},$slave[$j]{"wbs"},$master[$only_master]{"wbm"},$slave[$j]{"wbs"},$master[$only_master]{"wbm"};
|
} else {
|
} else {
|
printf OUTFILE "arbiter_%s : block\n",$slave[$j]{"wbs"};
|
printf OUTFILE "arbiter_%s : block\n",$slave[$j]{"wbs"};
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE " signal %s_bg, %s_bg_1, %s_bg_2, %s_bg_q : std_logic;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " signal %s_bg, %s_bg_1, %s_bg_2, %s_bg_q : std_logic;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " signal %s_trafic_limit : std_logic;\n",$master[$i]{"wbm"};
|
printf OUTFILE " signal %s_trafic_limit : std_logic;\n",$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
printf OUTFILE " signal ce, idle, ack : std_logic;\n";
|
printf OUTFILE " signal ce, idle, ack : std_logic;\n";
|
printf OUTFILE "begin\n";
|
printf OUTFILE "begin\n";
|
printf OUTFILE "ack <= %s_ack_o;\n",$slave[$j]{"wbs"};
|
printf OUTFILE "ack <= %s_ack_o;\n",$slave[$j]{"wbs"};
|
# instantiate trafic_supervision(s)
|
# instantiate trafic_supervision(s)
|
# calc tot priority per slave
|
# calc tot priority per slave
|
$priority = 0;
|
$priority = 0;
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
$priority += $master[$i]{("priority_".($slave[$j]{"wbs"}))}; };
|
$priority += $master[$i]{("priority_".($slave[$j]{"wbs"}))}; };
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE "\ntrafic_supervision_%s : entity work.trafic_supervision\n",$i;
|
printf OUTFILE "\ntrafic_supervision_%s : entity work.trafic_supervision\n",$i;
|
printf OUTFILE "generic map(\n";
|
printf OUTFILE "generic map(\n";
|
printf OUTFILE " priority => %s,\n",$master[$i]{("priority_".($slave[$j]{"wbs"}))};
|
printf OUTFILE " priority => %s,\n",$master[$i]{("priority_".($slave[$j]{"wbs"}))};
|
printf OUTFILE " tot_priority => %s)\n",$priority;
|
printf OUTFILE " tot_priority => %s)\n",$priority;
|
printf OUTFILE "port map(\n";
|
printf OUTFILE "port map(\n";
|
| Line 1301... |
Line 1301... |
};
|
};
|
};
|
};
|
# _bg_q
|
# _bg_q
|
# bg eq 1 => set
|
# bg eq 1 => set
|
# end of cycle => reset
|
# end of cycle => reset
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE "\nprocess(clk,reset)\nbegin\nif reset='1' then\n";
|
printf OUTFILE "\nprocess(clk,reset)\nbegin\nif reset='1' then\n";
|
printf OUTFILE " %s_bg_q <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_bg_q <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE "elsif clk'event and clk='1' then\n";
|
printf OUTFILE "elsif clk'event and clk='1' then\n";
|
printf OUTFILE "if %s_bg_q='0' then\n",$master[$i]{"wbm"};
|
printf OUTFILE "if %s_bg_q='0' then\n",$master[$i]{"wbm"};
|
printf OUTFILE " %s_bg_q <= %s_bg;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " %s_bg_q <= %s_bg;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "elsif ack='1'";
|
printf OUTFILE "elsif ack='1'";
|
if ($master[$i]{"tgc_o"} eq 1) {
|
if ($master[$i]{"tgc_o"} == 1) {
|
printf OUTFILE " and (%s_%s_o=\"%s\" or %s_%s_o=\"%s\")",$master[$i]{"wbm"},$rename_tgc,$classic,$master[$i]{"wbm"},$rename_tgc,$endofburst; };
|
printf OUTFILE " and (%s_%s_o=\"%s\" or %s_%s_o=\"%s\")",$master[$i]{"wbm"},$rename_tgc,$classic,$master[$i]{"wbm"},$rename_tgc,$endofburst; };
|
printf OUTFILE " then\n %s_bg_q <= '0';\nend if;\nend if;\nend process;\n",$master[$i]{"wbm"};
|
printf OUTFILE " then\n %s_bg_q <= '0';\nend if;\nend if;\nend process;\n",$master[$i]{"wbm"};
|
};
|
};
|
}; # end for
|
}; # end for
|
# _bg
|
# _bg
|
$depend = "";
|
$depend = "";
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$j]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$j]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "\nidle <= '1' when %s_bg_q='0'",$master[$tmp]{"wbm"};
|
printf OUTFILE "\nidle <= '1' when %s_bg_q='0'",$master[$tmp]{"wbm"};
|
for ($i=$tmp+1; $i le $masters; $i++) {
|
for ($i=$tmp+1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE " and %s_bg_q='0'",$master[$i]{"wbm"};
|
printf OUTFILE " and %s_bg_q='0'",$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
printf OUTFILE " else '0';\n";
|
printf OUTFILE " else '0';\n";
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and %s_cyc_o='1' and %s_%s_ss='1' and %s_trafic_limit='0' else '0';\n",$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$j]{"wbs"},$master[$tmp]{"wbm"};
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and %s_cyc_o='1' and %s_%s_ss='1' and %s_trafic_limit='0' else '0';\n",$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$j]{"wbs"},$master[$tmp]{"wbm"};
|
$depend = $master[$tmp]{"wbm"}."_bg_1='0'",;
|
$depend = $master[$tmp]{"wbm"}."_bg_1='0'",;
|
for ($i=$tmp+1; $i le $masters; $i++) {
|
for ($i=$tmp+1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and (%s) and %s_cyc_o='1' and %s_%s_ss='1' and %s_trafic_limit='0' else '0';\n",$master[$i]{"wbm"},$depend,$master[$i]{"wbm"},$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"};;
|
printf OUTFILE "%s_bg_1 <= '1' when idle='1' and (%s) and %s_cyc_o='1' and %s_%s_ss='1' and %s_trafic_limit='0' else '0';\n",$master[$i]{"wbm"},$depend,$master[$i]{"wbm"},$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"};;
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_1='0'";
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_1='0'";
|
};
|
};
|
};
|
};
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' and %s_%s_ss='1' else '0';\n",$master[$tmp]{"wbm"},$depend,$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' and %s_%s_ss='1' else '0';\n",$master[$tmp]{"wbm"},$depend,$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$j]{"wbs"};
|
$depend = $depend." and ".$master[$tmp]{"wbm"}."_bg_2='0'";
|
$depend = $depend." and ".$master[$tmp]{"wbm"}."_bg_2='0'";
|
$tmp1 = $tmp;
|
$tmp1 = $tmp;
|
for ($i=$tmp+1; $i le $masters; $i++) {
|
for ($i=$tmp+1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' and %s_%s_ss='1' else '0';\n",$master[$i]{"wbm"},$depend,$master[$i]{"wbm"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE "%s_bg_2 <= '1' when idle='1' and (%s) and %s_cyc_o='1' and %s_%s_ss='1' else '0';\n",$master[$i]{"wbm"},$depend,$master[$i]{"wbm"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_2='0'";
|
$depend = $depend." and ".$master[$i]{"wbm"}."_bg_2='0'";
|
};
|
};
|
};
|
};
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE "%s_bg <= %s_bg_q or %s_bg_1 or %s_bg_2;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_bg <= %s_bg_q or %s_bg_1 or %s_bg_2;\n",$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"},$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
# ce
|
# ce
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$j]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$j]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "ce <= (%s_cyc_o and %s_%s_ss)",$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE "ce <= (%s_cyc_o and %s_%s_ss)",$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$j]{"wbs"};
|
for ($i=$tmp+1; $i le $masters; $i++) {
|
for ($i=$tmp+1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_cyc_o and %s_%s_ss)",$master[$i]{"wbm"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " or (%s_cyc_o and %s_%s_ss)",$master[$i]{"wbm"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE " when idle='1' else '0';\n";
|
printf OUTFILE " when idle='1' else '0';\n";
|
# global bg
|
# global bg
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE "%s_%s_bg <= %s_bg;\n",$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_%s_bg <= %s_bg;\n",$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
printf OUTFILE "end block arbiter_%s;\n",$slave[$j]{"wbs"};
|
printf OUTFILE "end block arbiter_%s;\n",$slave[$j]{"wbs"};
|
};
|
};
|
| Line 1374... |
Line 1374... |
if ($interconnect eq "sharedbus") {
|
if ($interconnect eq "sharedbus") {
|
printf OUTFILE " signal adr : std_logic_vector(%s downto 0);\n",$adr_size-1;
|
printf OUTFILE " signal adr : std_logic_vector(%s downto 0);\n",$adr_size-1;
|
printf OUTFILE "begin\n";
|
printf OUTFILE "begin\n";
|
# adr
|
# adr
|
printf OUTFILE "adr <= (%s_adr_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
printf OUTFILE "adr <= (%s_adr_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
if ($masters gt 1){
|
if ($masters > 1){
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE " or (%s_adr_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE " or (%s_adr_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
# slave select
|
# slave select
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE "%s_ss <= '1' when adr(%s downto %s)=\"",$slave[$i]{"wbs"}, $adr_size-1,log(hex($slave[$i]{"size"}))/log(2);
|
printf OUTFILE "%s_ss <= '1' when adr(%s downto %s)=\"",$slave[$i]{"wbs"}, $adr_size-1,log(hex($slave[$i]{"size"}))/log(2);
|
$slave[$i]{"baseadr"}=hex($slave[$i]{"baseadr"});
|
$slave[$i]{"baseadr"}=hex($slave[$i]{"baseadr"});
|
for ($j=$adr_size-1; $j ge (log(hex($slave[$i]{"size"}))/log(2)); $j--) {
|
for ($j=$adr_size-1; $j >= (log(hex($slave[$i]{"size"}))/log(2)); $j--) {
|
if (($slave[$i]{"baseadr"}) >= (2**$j)) {
|
if (($slave[$i]{"baseadr"}) >= (2**$j)) {
|
$slave[$i]{"baseadr"} -= 2**$j;
|
$slave[$i]{"baseadr"} -= 2**$j;
|
printf OUTFILE "1";
|
printf OUTFILE "1";
|
} else {
|
} else {
|
printf OUTFILE "0";
|
printf OUTFILE "0";
|
};
|
};
|
};
|
};
|
printf OUTFILE "\"";
|
printf OUTFILE "\"";
|
# 1
|
# 1
|
if ($slave[$i]{"size1"} ne "ffffffff") {
|
if (hex($slave[$i]{"size1"}) != hex("ffffffff")) {
|
printf OUTFILE " else\n'1' when adr(%s downto %s)=\"",$adr_size-1,log(hex($slave[$i]{"size1"}))/log(2);
|
printf OUTFILE " else\n'1' when adr(%s downto %s)=\"",$adr_size-1,log(hex($slave[$i]{"size1"}))/log(2);
|
$slave[$i]{"baseadr1"}=hex($slave[$i]{"baseadr1"});
|
$slave[$i]{"baseadr1"}=hex($slave[$i]{"baseadr1"});
|
for ($j=$adr_size-1; $j ge (log(hex($slave[$i]{"size1"}))/log(2)); $j--) {
|
for ($j=$adr_size-1; $j >= (log(hex($slave[$i]{"size1"}))/log(2)); $j--) {
|
if (($slave[$i]{"baseadr1"}) >= (2**$j)) {
|
if (($slave[$i]{"baseadr1"}) >= (2**$j)) {
|
$slave[$i]{"baseadr1"} -= 2**$j;
|
$slave[$i]{"baseadr1"} -= 2**$j;
|
printf OUTFILE "1";
|
printf OUTFILE "1";
|
} else {
|
} else {
|
printf OUTFILE "0";
|
printf OUTFILE "0";
|
}; # end if
|
}; # end if
|
}; # end for
|
}; # end for
|
printf OUTFILE "\"";
|
printf OUTFILE "\"";
|
};
|
};
|
# 2
|
# 2
|
if ($slave[$i]{"size2"} ne "ffffffff") {
|
if (hex($slave[$i]{"size2"}) != hex("ffffffff")) {
|
printf OUTFILE " else\n'1' when adr(%s downto %s)=\"",$adr_size-1,log(hex($slave[$i]{"size2"}))/log(2);
|
printf OUTFILE " else\n'1' when adr(%s downto %s)=\"",$adr_size-1,log(hex($slave[$i]{"size2"}))/log(2);
|
$slave[$i]{"baseadr2"}=hex($slave[$i]{"baseadr2"});
|
$slave[$i]{"baseadr2"}=hex($slave[$i]{"baseadr2"});
|
for ($j=$adr_size-1; $j ge (log(hex($slave[$i]{"size2"}))/log(2)); $j--) {
|
for ($j=$adr_size-1; $j >= (log(hex($slave[$i]{"size2"}))/log(2)); $j--) {
|
if (($slave[$i]{"baseadr2"}) >= (2**$j)) {
|
if (($slave[$i]{"baseadr2"}) >= (2**$j)) {
|
$slave[$i]{"baseadr2"} -= 2**$j;
|
$slave[$i]{"baseadr2"} -= 2**$j;
|
printf OUTFILE "1";
|
printf OUTFILE "1";
|
} else {
|
} else {
|
printf OUTFILE "0";
|
printf OUTFILE "0";
|
};
|
};
|
};
|
};
|
printf OUTFILE "\"";
|
printf OUTFILE "\"";
|
};
|
};
|
# 3
|
# 3
|
if ($slave[$i]{"size3"} ne "ffffffff") {
|
if (hex($slave[$i]{"size3"}) != hex("ffffffff")) {
|
printf OUTFILE " else\n'1' when adr(%s downto %s)=\"",$adr_size-1,log(hex($slave[$i]{"size3"}))/log(2);
|
printf OUTFILE " else\n'1' when adr(%s downto %s)=\"",$adr_size-1,log(hex($slave[$i]{"size3"}))/log(2);
|
$slave[$i]{"baseadr3"}=hex($slave[$i]{"baseadr3"});
|
$slave[$i]{"baseadr3"}=hex($slave[$i]{"baseadr3"});
|
for ($j=$adr_size-1; $j ge (log(hex($slave[$i]{"size3"}))/log(2)); $j--) {
|
for ($j=$adr_size-1; $j >= (log(hex($slave[$i]{"size3"}))/log(2)); $j--) {
|
if (($slave[$i]{"baseadr3"}) >= (2**$j)) {
|
if (($slave[$i]{"baseadr3"}) >= (2**$j)) {
|
$slave[$i]{"baseadr3"} -= 2**$j;
|
$slave[$i]{"baseadr3"} -= 2**$j;
|
printf OUTFILE "1";
|
printf OUTFILE "1";
|
} else {
|
} else {
|
printf OUTFILE "0";
|
printf OUTFILE "0";
|
| Line 1437... |
Line 1437... |
printf OUTFILE "\"";
|
printf OUTFILE "\"";
|
};
|
};
|
printf OUTFILE " else\n'0';\n";
|
printf OUTFILE " else\n'0';\n";
|
# adr to slaves
|
# adr to slaves
|
};
|
};
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE "%s_adr_i <= adr(%s downto %s);\n",$slave[$i]{"wbs"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"}; };
|
printf OUTFILE "%s_adr_i <= adr(%s downto %s);\n",$slave[$i]{"wbs"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"}; };
|
# crossbar switch
|
# crossbar switch
|
} else {
|
} else {
|
printf OUTFILE "begin\n";
|
printf OUTFILE "begin\n";
|
# master_slave_ss
|
# master_slave_ss
|
# $j=0;
|
# $j=0;
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
$slave[$j]{"baseadr"}=hex($slave[$j]{"baseadr"});
|
$slave[$j]{"baseadr"}=hex($slave[$j]{"baseadr"});
|
for ($j=1; $j le $slaves; $j++) {
|
for ($j=1; $j <= $slaves; $j++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE "%s_%s_ss <= '1' when %s_adr_o(%s downto %s)=\"",$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"},$adr_size-1,log(hex($slave[$j]{"size"}))/log(2);
|
printf OUTFILE "%s_%s_ss <= '1' when %s_adr_o(%s downto %s)=\"",$master[$i]{"wbm"},$slave[$j]{"wbs"},$master[$i]{"wbm"},$adr_size-1,log(hex($slave[$j]{"size"}))/log(2);
|
$tmp=hex($slave[$j]{"baseadr"});
|
$tmp=hex($slave[$j]{"baseadr"});
|
for ($k=$adr_size-1; $k ge (log(hex($slave[$j]{"size"}))/log(2)); $k--) {
|
for ($k=$adr_size-1; $k >= (log(hex($slave[$j]{"size"}))/log(2)); $k--) {
|
if ($tmp >= (2**$k)) {
|
if ($tmp >= (2**$k)) {
|
$tmp -= 2**$k;
|
$tmp -= 2**$k;
|
printf OUTFILE "1";
|
printf OUTFILE "1";
|
} else {
|
} else {
|
printf OUTFILE "0";
|
printf OUTFILE "0";
|
};
|
};
|
};
|
};
|
printf OUTFILE "\"";
|
printf OUTFILE "\"";
|
# 2?
|
# 2?
|
if ($slave[$j]{"size1"} ne "ffffffff") {
|
if (hex($slave[$j]{"size1"}) != hex("ffffffff")) {
|
printf OUTFILE " else\n'1' when %s_adr_o(%s downto %s)=\"",$master[$i]{"wbm"},$adr_size-1,log(hex($slave[$j]{"size1"}))/log(2);
|
printf OUTFILE " else\n'1' when %s_adr_o(%s downto %s)=\"",$master[$i]{"wbm"},$adr_size-1,log(hex($slave[$j]{"size1"}))/log(2);
|
$tmp=hex($slave[$j]{"baseadr1"});
|
$tmp=hex($slave[$j]{"baseadr1"});
|
for ($k=$adr_size-1; $k ge (log(hex($slave[$j]{"size1"}))/log(2)); $k--) {
|
for ($k=$adr_size-1; $k >= (log(hex($slave[$j]{"size1"}))/log(2)); $k--) {
|
if ($tmp >= (2**$k)) {
|
if ($tmp >= (2**$k)) {
|
$tmp -= 2**$k;
|
$tmp -= 2**$k;
|
printf OUTFILE "1";
|
printf OUTFILE "1";
|
} else {
|
} else {
|
printf OUTFILE "0";
|
printf OUTFILE "0";
|
};
|
};
|
};
|
};
|
printf OUTFILE "\"";
|
printf OUTFILE "\"";
|
};
|
};
|
# 3?
|
# 3?
|
if ($slave[$j]{"size2"} ne "ffffffff") {
|
if (hex($slave[$j]{"size2"}) != hex("ffffffff")) {
|
printf OUTFILE " else\n'1' when %s_adr_o(%s downto %s)=\"",$master[$i]{"wbm"},$adr_size-1,log(hex($slave[$j]{"size2"}))/log(2);
|
printf OUTFILE " else\n'1' when %s_adr_o(%s downto %s)=\"",$master[$i]{"wbm"},$adr_size-1,log(hex($slave[$j]{"size2"}))/log(2);
|
$tmp=hex($slave[$j]{"baseadr2"});
|
$tmp=hex($slave[$j]{"baseadr2"});
|
for ($k=$adr_size-1; $k ge (log(hex($slave[$j]{"size2"}))/log(2)); $k--) {
|
for ($k=$adr_size-1; $k >= (log(hex($slave[$j]{"size2"}))/log(2)); $k--) {
|
if ($tmp >= (2**$k)) {
|
if ($tmp >= (2**$k)) {
|
$tmp -= 2**$k;
|
$tmp -= 2**$k;
|
printf OUTFILE "1";
|
printf OUTFILE "1";
|
} else {
|
} else {
|
printf OUTFILE "0";
|
printf OUTFILE "0";
|
| Line 1492... |
Line 1492... |
printf OUTFILE " else \n'0';\n";
|
printf OUTFILE " else \n'0';\n";
|
}; #if
|
}; #if
|
};
|
};
|
};
|
};
|
# _adr_o
|
# _adr_o
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
# mux ?
|
# mux ?
|
$tmp=0;
|
$tmp=0;
|
for ($l=1; $l le $masters; $l++) {
|
for ($l=1; $l <= $masters; $l++) {
|
if ($master[$l]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$l]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
$tmp++;
|
$tmp++;
|
};
|
};
|
};
|
};
|
if ($tmp eq 1) {
|
if ($tmp eq 1) {
|
$k=1; until ($master[$k]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$k++};
|
$k=1; until ($master[$k]{("priority_".($slave[$i]{"wbs"}))} != 0) {$k++};
|
printf OUTFILE "%s_adr_i <= %s_adr_o(%s downto %s);\n",$slave[$i]{"wbs"},$master[$k]{"wbm"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"};
|
printf OUTFILE "%s_adr_i <= %s_adr_o(%s downto %s);\n",$slave[$i]{"wbs"},$master[$k]{"wbm"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"};
|
} else {
|
} else {
|
$k=1; until ($master[$k]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$k++};
|
$k=1; until ($master[$k]{("priority_".($slave[$i]{"wbs"}))} != 0) {$k++};
|
printf OUTFILE "%s_adr_i <= (%s_adr_o(%s downto %s) and %s_%s_bg)",$slave[$i]{"wbs"},$master[$k]{"wbm"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"},$master[$k]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_adr_i <= (%s_adr_o(%s downto %s) and %s_%s_bg)",$slave[$i]{"wbs"},$master[$k]{"wbm"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"},$master[$k]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$k+1; $j le $masters; $j++) {
|
for ($j=$k+1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_adr_o(%s downto %s) and %s_%s_bg)",$master[$j]{"wbm"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_adr_o(%s downto %s) and %s_%s_bg)",$master[$j]{"wbm"},$slave[$i]{"adr_i_hi"},$slave[$i]{"adr_i_lo"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
| Line 1521... |
Line 1521... |
};
|
};
|
|
|
sub gen_muxshb{
|
sub gen_muxshb{
|
printf OUTFILE "mux: block\n";
|
printf OUTFILE "mux: block\n";
|
printf OUTFILE " signal cyc, stb, we, ack : std_logic;\n";
|
printf OUTFILE " signal cyc, stb, we, ack : std_logic;\n";
|
if (($rty_i gt 0) && ($rty_o gt 1)) {
|
if (($rty_i > 0) && ($rty_o > 1)) {
|
printf OUTFILE " signal rty : std_logic;\n"; };
|
printf OUTFILE " signal rty : std_logic;\n"; };
|
if (($err_i gt 0) && ($err_o gt 1)) {
|
if (($err_i > 0) && ($err_o > 1)) {
|
printf OUTFILE " signal err : std_logic;\n"; };
|
printf OUTFILE " signal err : std_logic;\n"; };
|
if ($dat_size eq 8) {
|
if ($dat_size eq 8) {
|
printf OUTFILE " signal sel : std_logic;\n";
|
printf OUTFILE " signal sel : std_logic;\n";
|
} else {
|
} else {
|
printf OUTFILE " signal sel : std_logic_vector(%s downto 0);\n",$dat_size/8-1;
|
printf OUTFILE " signal sel : std_logic_vector(%s downto 0);\n",$dat_size/8-1;
|
};
|
};
|
printf OUTFILE " signal dat_m2s, dat_s2m : std_logic_vector(%s downto 0);\n",$dat_size-1;
|
printf OUTFILE " signal dat_m2s, dat_s2m : std_logic_vector(%s downto 0);\n",$dat_size-1;
|
if (($tgc_o gt 0) && ($tgc_i gt 0)) {
|
if (($tgc_o > 0) && ($tgc_i > 0)) {
|
printf OUTFILE " signal tgc : std_logic_vector(%s downto 0);\n",$tgc_bits-1; };
|
printf OUTFILE " signal tgc : std_logic_vector(%s downto 0);\n",$tgc_bits-1; };
|
if (($tga_o gt 0) && ($tga_i gt 0)) {
|
if (($tga_o > 0) && ($tga_i > 0)) {
|
printf OUTFILE " signal tga : std_logic_vector(%s downto 0);\n",$tga_bits-1; };
|
printf OUTFILE " signal tga : std_logic_vector(%s downto 0);\n",$tga_bits-1; };
|
printf OUTFILE "begin\n";
|
printf OUTFILE "begin\n";
|
# cyc
|
# cyc
|
printf OUTFILE "cyc <= (%s_cyc_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
printf OUTFILE "cyc <= (%s_cyc_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
if ($masters gt 1) {
|
if ($masters > 1) {
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE " or (%s_cyc_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE " or (%s_cyc_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE "%s_cyc_i <= %s_ss and cyc;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
printf OUTFILE "%s_cyc_i <= %s_ss and cyc;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
# stb
|
# stb
|
printf OUTFILE "stb <= (%s_stb_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
printf OUTFILE "stb <= (%s_stb_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
if ($masters gt 1) {
|
if ($masters > 1) {
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE " or (%s_stb_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE " or (%s_stb_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE "%s_stb_i <= stb;\n",$slave[$i]{"wbs"}; };
|
printf OUTFILE "%s_stb_i <= stb;\n",$slave[$i]{"wbs"}; };
|
# we
|
# we
|
$i=1; until ($master[$i]{"type"} ne "ro") {$i++};
|
$i=1; until ($master[$i]{"type"} ne "ro") {$i++};
|
printf OUTFILE "we <= (%s_we_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "we <= (%s_we_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
if ($i lt $masters) {
|
if ($i < $masters) {
|
for ($j=$i+1; $j le $masters; $j++) {
|
for ($j=$i+1; $j <= $masters; $j++) {
|
if ($master[$j]{"type"} ne "ro") {
|
if ($master[$j]{"type"} ne "ro") {
|
printf OUTFILE " or (%s_we_o and %s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"};
|
printf OUTFILE " or (%s_we_o and %s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"};
|
};
|
};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"type"} ne "ro") {
|
if ($slave[$i]{"type"} ne "ro") {
|
printf OUTFILE "%s_we_i <= we;\n",$slave[$i]{"wbs"};
|
printf OUTFILE "%s_we_i <= we;\n",$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
# ack
|
# ack
|
printf OUTFILE "ack <= %s_ack_o",$slave[1]{"wbs"};
|
printf OUTFILE "ack <= %s_ack_o",$slave[1]{"wbs"};
|
for ($i=2; $i le $slaves; $i++) {
|
for ($i=2; $i <= $slaves; $i++) {
|
printf OUTFILE " or %s_ack_o",$slave[$i]{"wbs"}; };
|
printf OUTFILE " or %s_ack_o",$slave[$i]{"wbs"}; };
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
printf OUTFILE "%s_ack_i <= ack and %s_bg;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE "%s_ack_i <= ack and %s_bg;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
# rty
|
# rty
|
if (($rty_o eq 0) && ($rty_i gt 0)) {
|
if (($rty_o == 0) && ($rty_i > 0)) {
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"rty_i"} eq 1) {
|
if ($master[$i]{"rty_i"} == 1) {
|
printf OUTFILE "%s_rty_i <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE "%s_rty_i <= '0';\n",$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
} elsif (($rty_o eq 1) && ($rty_i gt 0)) {
|
} elsif (($rty_o == 1) && ($rty_i > 0)) {
|
$i=1; until ($slave[$i]{"rty_o"} eq 1) {$i++};
|
$i=1; until ($slave[$i]{"rty_o"} == 1) {$i++};
|
for ($j=1; $j le $masters; $j++) {
|
for ($j=1; $j <= $masters; $j++) {
|
if ($master[$j]{"rty_i"} eq 1) {
|
if ($master[$j]{"rty_i"} == 1) {
|
printf OUTFILE "%s_rty_i <= %s_rty_o;\n",$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_rty_i <= %s_rty_o;\n",$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
} elsif (($rty_o gt 1) && ($rty_i gt 0)) {
|
} elsif (($rty_o > 1) && ($rty_i > 0)) {
|
$i=1; until ($slave[$i]{"rty_o"} eq 1) {$i++};
|
$i=1; until ($slave[$i]{"rty_o"} == 1) {$i++};
|
printf OUTFILE "rty <= %s_rty_o",$slave[$i]{"wbs"};
|
printf OUTFILE "rty <= %s_rty_o",$slave[$i]{"wbs"};
|
for ($j=$i+1; $j le $slaves; $j++) {
|
for ($j=$i+1; $j <= $slaves; $j++) {
|
if ($slave[$j]{"rty_o"} eq 1) {
|
if ($slave[$j]{"rty_o"} == 1) {
|
printf OUTFILE " or %s_rty_o",$slave[$j]{"wbs"};
|
printf OUTFILE " or %s_rty_o",$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"rty_i"} eq 1) {
|
if ($master[$i]{"rty_i"} == 1) {
|
printf OUTFILE "%s_rty_i <= rty;\n",$master[$i]{"wbm"};
|
printf OUTFILE "%s_rty_i <= rty;\n",$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
};
|
};
|
# err
|
# err
|
if (($err_o eq 0) && ($err_i gt 0)) {
|
if (($err_o == 0) && ($err_i > 0)) {
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"err_i"} eq 1) {
|
if ($master[$i]{"err_i"} == 1) {
|
printf OUTFILE "%s_err_i <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE "%s_err_i <= '0';\n",$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
} elsif (($err_o eq 1) && ($err_i gt 0)) {
|
} elsif (($err_o == 1) && ($err_i > 0)) {
|
$i=1; until ($slave[$i]{"err_o"} eq 1) {$i++};
|
$i=1; until ($slave[$i]{"err_o"} == 1) {$i++};
|
for ($j=1; $j le $masters; $j++) {
|
for ($j=1; $j <= $masters; $j++) {
|
if ($master[$j]{"err_i"} eq 1) {
|
if ($master[$j]{"err_i"} == 1) {
|
printf OUTFILE "%s_err_i <= %s_err_o;\n",$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_err_i <= %s_err_o;\n",$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
} elsif (($err_o gt 1) && ($err_i gt 0)) {
|
} elsif (($err_o > 1) && ($err_i > 0)) {
|
$i=1; until ($slave[$i]{"err_o"} eq 1) {$i++};
|
$i=1; until ($slave[$i]{"err_o"} == 1) {$i++};
|
printf OUTFILE "err <= %s_err_o",$slave[$i]{"wbs"};
|
printf OUTFILE "err <= %s_err_o",$slave[$i]{"wbs"};
|
for ($j=$i+1; $j le $slaves; $j++) {
|
for ($j=$i+1; $j <= $slaves; $j++) {
|
if ($slave[$j]{"err_o"} eq 1) {
|
if ($slave[$j]{"err_o"} == 1) {
|
printf OUTFILE " or %s_err_o",$slave[$j]{"wbs"};
|
printf OUTFILE " or %s_err_o",$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"err_i"} eq 1) {
|
if ($master[$i]{"err_i"} == 1) {
|
printf OUTFILE "%s_err_i <= err;\n",$master[$i]{"wbm"};
|
printf OUTFILE "%s_err_i <= err;\n",$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
};
|
};
|
# sel
|
# sel
|
printf OUTFILE "sel <= (%s_sel_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
printf OUTFILE "sel <= (%s_sel_o and %s_bg)",$master[1]{"wbm"},$master[1]{"wbm"};
|
if ($masters gt 1) {
|
if ($masters > 1) {
|
for ($i=2; $i le $masters; $i++) {
|
for ($i=2; $i <= $masters; $i++) {
|
printf OUTFILE " or (%s_sel_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE " or (%s_sel_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
printf OUTFILE "%s_sel_i <= sel;\n",$slave[$i]{"wbs"}; };
|
printf OUTFILE "%s_sel_i <= sel;\n",$slave[$i]{"wbs"}; };
|
# data m2s
|
# data m2s
|
$i=1; until ($master[$i]{"type"} ne "ro") {$i++};
|
$i=1; until ($master[$i]{"type"} ne "ro") {$i++};
|
printf OUTFILE "dat_m2s <= (%s_dat_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "dat_m2s <= (%s_dat_o and %s_bg)",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
if ($i lt $masters) {
|
if ($i < $masters) {
|
for ($j=$i+1; $j le $masters; $j++) {
|
for ($j=$i+1; $j <= $masters; $j++) {
|
printf OUTFILE " or (%s_dat_o and %s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"};
|
printf OUTFILE " or (%s_dat_o and %s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"type"} ne "ro") {
|
if ($slave[$i]{"type"} ne "ro") {
|
printf OUTFILE "%s_dat_i <= dat_m2s;\n",$slave[$i]{"wbs"};
|
printf OUTFILE "%s_dat_i <= dat_m2s;\n",$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
# data s2m
|
# data s2m
|
$i=1; until ($slave[$i]{"type"} ne "wo") {$i++};
|
$i=1; until ($slave[$i]{"type"} ne "wo") {$i++};
|
printf OUTFILE "dat_s2m <= (%s_dat_o and %s_ss)",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "dat_s2m <= (%s_dat_o and %s_ss)",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
if ($i lt $slaves) {
|
if ($i < $slaves) {
|
for ($j=$i+1; $j le $slaves; $j++) {
|
for ($j=$i+1; $j <= $slaves; $j++) {
|
printf OUTFILE " or (%s_dat_o and %s_ss)",$slave[$j]{"wbs"},$slave[$j]{"wbs"};
|
printf OUTFILE " or (%s_dat_o and %s_ss)",$slave[$j]{"wbs"},$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"type"} ne "wo") {
|
if ($master[$i]{"type"} ne "wo") {
|
printf OUTFILE "%s_dat_i <= dat_s2m;\n",$master[$i]{"wbm"};
|
printf OUTFILE "%s_dat_i <= dat_s2m;\n",$master[$i]{"wbm"};
|
};
|
};
|
};
|
};
|
# tgc
|
# tgc
|
if (($tgc_o eq 0) && ($tgc_i gt 0)) {
|
if (($tgc_o == 0) && ($tgc_i > 0)) {
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"tgc_i"} eq 1) {
|
if ($slave[$i]{"tgc_i"} == 1) {
|
printf OUTFILE "%s_%s_i <= %s;\n",$slave[$i]{"wbs"},$rename_tgc,$classic;
|
printf OUTFILE "%s_%s_i <= %s;\n",$slave[$i]{"wbs"},$rename_tgc,$classic;
|
};
|
};
|
};
|
};
|
} elsif (($tgc_o gt 0) && ($tgc_i gt 0)) {
|
} elsif (($tgc_o > 0) && ($tgc_i > 0)) {
|
$i=1; until ($master[$i]{"tgc_o"} eq 1) {$i++};
|
$i=1; until ($master[$i]{"tgc_o"} == 1) {$i++};
|
printf OUTFILE "tgc <= (%s_%s_o and %s_bg)",$master[$i]{"wbm"},$rename_tgc,$master[$i]{"wbm"};
|
printf OUTFILE "tgc <= (%s_%s_o and %s_bg)",$master[$i]{"wbm"},$rename_tgc,$master[$i]{"wbm"};
|
for ($j=$i+1; $j le $masters; $j++) {
|
for ($j=$i+1; $j <= $masters; $j++) {
|
if ($master[$j]{"tgc_o"} eq 1) {
|
if ($master[$j]{"tgc_o"} == 1) {
|
printf OUTFILE " or (%s_%s_o and %s_bg)",$master[$j]{"wbm"},$rename_tgc,$master[$j]{"wbm"};
|
printf OUTFILE " or (%s_%s_o and %s_bg)",$master[$j]{"wbm"},$rename_tgc,$master[$j]{"wbm"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"tgc_i"} eq 1) {
|
if ($slave[$i]{"tgc_i"} == 1) {
|
printf OUTFILE "%s_%s_i <= tgc;\n",$slave[$i]{"wbs"},$rename_tgc,$slave[$i]{"wbs"};
|
printf OUTFILE "%s_%s_i <= tgc;\n",$slave[$i]{"wbs"},$rename_tgc,$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
};
|
};
|
# tga
|
# tga
|
if (($tga_o eq 0) && ($tga_i gt 0)) {
|
if (($tga_o == 0) && ($tga_i > 0)) {
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"tga_i"} eq 1) {
|
if ($slave[$i]{"tga_i"} == 1) {
|
printf OUTFILE "%s_%s_i <= (others=>'0');\n",$slave[$i]{"wbs"},$rename_tga;
|
printf OUTFILE "%s_%s_i <= (others=>'0');\n",$slave[$i]{"wbs"},$rename_tga;
|
};
|
};
|
};
|
};
|
} elsif (($tga_o gt 0) && ($tga_i gt 0)) {
|
} elsif (($tga_o > 0) && ($tga_i > 0)) {
|
$i=1; until ($master[$i]{"tga_o"} eq 1) {$i++};
|
$i=1; until ($master[$i]{"tga_o"} == 1) {$i++};
|
printf OUTFILE "tga <= (%s_%s_o and %s_bg)",$master[$i]{"wbm"},$rename_tga,$master[$i]{"wbm"};
|
printf OUTFILE "tga <= (%s_%s_o and %s_bg)",$master[$i]{"wbm"},$rename_tga,$master[$i]{"wbm"};
|
for ($j=$i+1; $j le $masters; $j++) {
|
for ($j=$i+1; $j <= $masters; $j++) {
|
if ($master[$j]{"tga_o"} eq 1) {
|
if ($master[$j]{"tga_o"} == 1) {
|
printf OUTFILE " or (%s_%s_o and %s_bg)",$master[$j]{"wbm"},$rename_tga,$master[$j]{"wbm"};
|
printf OUTFILE " or (%s_%s_o and %s_bg)",$master[$j]{"wbm"},$rename_tga,$master[$j]{"wbm"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"tga_i"} eq 1) {
|
if ($slave[$i]{"tga_i"} == 1) {
|
printf OUTFILE "%s_%s_i <= tga;\n",$slave[$i]{"wbs"},$rename_tga,$slave[$i]{"wbs"};
|
printf OUTFILE "%s_%s_i <= tga;\n",$slave[$i]{"wbs"},$rename_tga,$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
};
|
};
|
# end block
|
# end block
|
| Line 1724... |
Line 1724... |
};
|
};
|
|
|
sub gen_muxcbs{
|
sub gen_muxcbs{
|
# cyc
|
# cyc
|
printf OUTFILE "-- cyc_i(s)\n";
|
printf OUTFILE "-- cyc_i(s)\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_cyc_i <= (%s_cyc_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_cyc_i <= (%s_cyc_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$tmp+1; $j le $masters; $j++) {
|
for ($j=$tmp+1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_cyc_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_cyc_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
# stb
|
# stb
|
printf OUTFILE "-- stb_i(s)\n";
|
printf OUTFILE "-- stb_i(s)\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_stb_i <= (%s_stb_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_stb_i <= (%s_stb_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$tmp+1; $j le $masters; $j++) {
|
for ($j=$tmp+1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_stb_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_stb_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
# we
|
# we
|
printf OUTFILE "-- we_i(s)\n";
|
printf OUTFILE "-- we_i(s)\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"type"} ne "ro") {
|
if ($slave[$i]{"type"} ne "ro") {
|
$tmp=1; until (($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) && ($master[$tmp]{"type"} ne "ro")) {$tmp++};
|
$tmp=1; until (($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) && ($master[$tmp]{"type"} ne "ro")) {$tmp++};
|
printf OUTFILE "%s_we_i <= (%s_we_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_we_i <= (%s_we_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$tmp+1; $j le $masters; $j++) {
|
for ($j=$tmp+1; $j <= $masters; $j++) {
|
if (($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) && ($master[$j]{"type"} ne "ro")) {
|
if (($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) && ($master[$j]{"type"} ne "ro")) {
|
printf OUTFILE " or (%s_we_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_we_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
};
|
};
|
# ack
|
# ack
|
printf OUTFILE "-- ack_i(s)\n";
|
printf OUTFILE "-- ack_i(s)\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_ack_i <= (%s_ack_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
printf OUTFILE "%s_ack_i <= (%s_ack_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
for ($j=$tmp+1; $j le $slaves; $j++) {
|
for ($j=$tmp+1; $j <= $slaves; $j++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_ack_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " or (%s_ack_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
# rty
|
# rty
|
printf OUTFILE "-- rty_i(s)\n";
|
printf OUTFILE "-- rty_i(s)\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"rty_i"} eq 1) {
|
if ($master[$i]{"rty_i"} == 1) {
|
$rty_o=0;
|
$rty_o=0;
|
for ($j=1; $j le $masters; $j++) {
|
for ($j=1; $j <= $masters; $j++) {
|
if (($slave[$j]{"rty_o"} eq 1) && ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0)) {
|
if (($slave[$j]{"rty_o"} == 1) && ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0)) {
|
$rty_o+=1;
|
$rty_o+=1;
|
};
|
};
|
};
|
};
|
if ($rty_o eq 0) {
|
if ($rty_o == 0) {
|
printf OUTFILE "%s_rty_i <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE "%s_rty_i <= '0';\n",$master[$i]{"wbm"};
|
} else {
|
} else {
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_rty_i <= (%s_rty_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
printf OUTFILE "%s_rty_i <= (%s_rty_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
for ($j=$tmp+1; $j le $slaves; $j++) {
|
for ($j=$tmp+1; $j <= $slaves; $j++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_rty_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " or (%s_rty_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
};
|
};
|
};
|
};
|
# err
|
# err
|
printf OUTFILE "-- err_i(s)\n";
|
printf OUTFILE "-- err_i(s)\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"err_i"} eq 1) {
|
if ($master[$i]{"err_i"} == 1) {
|
$err_o=0;
|
$err_o=0;
|
for ($j=1; $j le $masters; $j++) {
|
for ($j=1; $j <= $masters; $j++) {
|
if (($slave[$j]{"err_o"} eq 1) && ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0)) {
|
if (($slave[$j]{"err_o"} == 1) && ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0)) {
|
$err_o+=1;
|
$err_o+=1;
|
};
|
};
|
};
|
};
|
if ($err_o eq 0) {
|
if ($err_o == 0) {
|
printf OUTFILE "%s_err_i <= '0';\n",$master[$i]{"wbm"};
|
printf OUTFILE "%s_err_i <= '0';\n",$master[$i]{"wbm"};
|
} else {
|
} else {
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_err_i <= (%s_err_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
printf OUTFILE "%s_err_i <= (%s_err_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
for ($j=$tmp+1; $j le $slaves; $j++) {
|
for ($j=$tmp+1; $j <= $slaves; $j++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_err_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " or (%s_err_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
};
|
};
|
};
|
};
|
# sel
|
# sel
|
printf OUTFILE "-- sel_i(s)\n";
|
printf OUTFILE "-- sel_i(s)\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($dat_size >= 16) {
|
if ($dat_size >= 16) {
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_sel_i <= (%s_sel_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_sel_i <= (%s_sel_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$tmp+1; $j le $masters; $j++) {
|
for ($j=$tmp+1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
printf OUTFILE " or (%s_sel_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_sel_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
};
|
};
|
# dat
|
# dat
|
printf OUTFILE "-- slave dat_i(s)\n";
|
printf OUTFILE "-- slave dat_i(s)\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"type"} ne "ro") {
|
if ($slave[$i]{"type"} ne "ro") {
|
$tmp=0;
|
$tmp=0;
|
for ($j=1; $j le $masters; $j++) {
|
for ($j=1; $j <= $masters; $j++) {
|
if (($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) && ($master[$j]{"type"} ne "ro")) {
|
if (($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) && ($master[$j]{"type"} ne "ro")) {
|
$tmp+=1;
|
$tmp+=1;
|
};
|
};
|
};
|
};
|
if ($tmp eq 1) {
|
if ($tmp == 1) {
|
$j=1; until (($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) && ($master[$j]{"type"} ne "ro")) {$j++};
|
$j=1; until (($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) && ($master[$j]{"type"} ne "ro")) {$j++};
|
printf OUTFILE "%s_dat_i <= %s_dat_o;\n",$slave[$i]{"wbs"},$master[$j]{"wbm"};
|
printf OUTFILE "%s_dat_i <= %s_dat_o;\n",$slave[$i]{"wbs"},$master[$j]{"wbm"};
|
} elsif ($tmp >= 1) {
|
} elsif ($tmp >= 1) {
|
$tmp=1; until (($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) && ($master[$tmp]{"type"} ne "ro")) {$tmp++};
|
$tmp=1; until (($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) && ($master[$tmp]{"type"} ne "ro")) {$tmp++};
|
printf OUTFILE "%s_dat_i <= (%s_dat_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_dat_i <= (%s_dat_o and %s_%s_bg)",$slave[$i]{"wbs"},$master[$tmp]{"wbm"},$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$tmp+1; $j le $masters; $j++) {
|
for ($j=$tmp+1; $j <= $masters; $j++) {
|
if (($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) && ($master[$j]{"type"} ne "ro")) {
|
if (($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) && ($master[$j]{"type"} ne "ro")) {
|
printf OUTFILE " or (%s_dat_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_dat_o and %s_%s_bg)",$master[$j]{"wbm"},$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
};
|
};
|
};
|
};
|
printf OUTFILE "-- master dat_i(s)\n";
|
printf OUTFILE "-- master dat_i(s)\n";
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"type"} ne "wo") {
|
if ($master[$i]{"type"} ne "wo") {
|
$tmp=0;
|
$tmp=0;
|
for ($j=1; $j le $slaves; $j++) {
|
for ($j=1; $j <= $slaves; $j++) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) {
|
if ($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) {
|
$tmp+=1;
|
$tmp+=1;
|
};
|
};
|
};
|
};
|
if ($tmp eq 1) {
|
if ($tmp == 1) {
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_dat_i <= %s_dat_o",$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
printf OUTFILE "%s_dat_i <= %s_dat_o",$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
} else {
|
} else {
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} ne 0) {$tmp++};
|
$tmp=1; until ($master[$i]{("priority_".($slave[$tmp]{"wbs"}))} != 0) {$tmp++};
|
printf OUTFILE "%s_dat_i <= (%s_dat_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
printf OUTFILE "%s_dat_i <= (%s_dat_o and %s_%s_bg)",$master[$i]{"wbm"},$slave[$tmp]{"wbs"},$master[$i]{"wbm"},$slave[$tmp]{"wbs"};
|
for ($j=$tmp+1; $j le $slaves; $j++) {
|
for ($j=$tmp+1; $j <= $slaves; $j++) {
|
if (($master[$i]{("priority_".($slave[$j]{"wbs"}))} ne 0) && ($master[$i]{"type"} ne "wo")) {
|
if (($master[$i]{("priority_".($slave[$j]{"wbs"}))} != 0) && ($master[$i]{"type"} ne "wo")) {
|
printf OUTFILE " or (%s_dat_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
printf OUTFILE " or (%s_dat_o and %s_%s_bg)",$slave[$j]{"wbs"},$master[$i]{"wbm"},$slave[$j]{"wbs"};
|
};
|
};
|
};
|
};
|
};
|
};
|
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
};
|
};
|
# tgc
|
# tgc
|
printf OUTFILE "-- tgc_i\n";
|
printf OUTFILE "-- tgc_i\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"tgc_i"} eq 1) {
|
if ($slave[$i]{"tgc_i"} == 1) {
|
$tmp=0;
|
$tmp=0;
|
for ($j=1; $j le $masters; $j++) {
|
for ($j=1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
$tmp+=1;
|
$tmp+=1;
|
};
|
};
|
};
|
};
|
if ($tmp eq 1) {
|
if ($tmp == 1) {
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$tmp++;};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) {$tmp++;};
|
printf OUTFILE "%s_%s_i <= %s_%s_o",$slave[$i]{"wbs"},$rename_tgc,$master[$tmp]{"wbm"},$rename_tgc;
|
printf OUTFILE "%s_%s_i <= %s_%s_o",$slave[$i]{"wbs"},$rename_tgc,$master[$tmp]{"wbm"},$rename_tgc;
|
} else {
|
} else {
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$tmp++;};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) {$tmp++;};
|
printf OUTFILE "%s_%s_i <= (%s_%s_o and %s_%s_bg)",$slave[$i]{"wbs"},$rename_tgc,$master[$tmp]{"wbm"},$rename_tgc,$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_%s_i <= (%s_%s_o and %s_%s_bg)",$slave[$i]{"wbs"},$rename_tgc,$master[$tmp]{"wbm"},$rename_tgc,$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$tmp+1; $j le $masters; $j++) {
|
for ($j=$tmp+1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
if ($master[$j]{"tga_o"} eq 1) {
|
if ($master[$j]{"tga_o"} == 1) {
|
printf OUTFILE " or (%s_%s_o and %s_%s_bg)",$master[$j]{"wbm"},$rename_tgc,$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_%s_o and %s_%s_bg)",$master[$j]{"wbm"},$rename_tgc,$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
} else {
|
} else {
|
if ($classic ne "000") {
|
if ($classic ne "000") {
|
printf OUTFILE " or \"%s\"",$classic;
|
printf OUTFILE " or \"%s\"",$classic;
|
};
|
};
|
| Line 1917... |
Line 1917... |
printf OUTFILE ";\n";
|
printf OUTFILE ";\n";
|
};
|
};
|
};
|
};
|
# tga
|
# tga
|
printf OUTFILE "-- tga_i\n";
|
printf OUTFILE "-- tga_i\n";
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"tga_i"} eq 1) {
|
if ($slave[$i]{"tga_i"} == 1) {
|
$tmp=0;
|
$tmp=0;
|
for ($j=1; $j le $masters; $j++) {
|
for ($j=1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
$tmp+=1;
|
$tmp+=1;
|
};
|
};
|
};
|
};
|
if ($tmp eq 1) {
|
if ($tmp == 1) {
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$tmp++;};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) {$tmp++;};
|
printf OUTFILE "%s_%s_i <= %s_%s_o",$slave[$i]{"wbs"},$rename_tga,$master[$tmp]{"wbm"},$rename_tga;
|
printf OUTFILE "%s_%s_i <= %s_%s_o",$slave[$i]{"wbs"},$rename_tga,$master[$tmp]{"wbm"},$rename_tga;
|
} else {
|
} else {
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} ne 0) {$tmp++;};
|
$tmp=1; until ($master[$tmp]{("priority_".($slave[$i]{"wbs"}))} != 0) {$tmp++;};
|
printf OUTFILE "%s_%s_i <= (%s_%s_o and %s_%s_bg)",$slave[$i]{"wbs"},$rename_tga,$master[$tmp]{"wbm"},$rename_tga,$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_%s_i <= (%s_%s_o and %s_%s_bg)",$slave[$i]{"wbs"},$rename_tga,$master[$tmp]{"wbm"},$rename_tga,$master[$tmp]{"wbm"},$slave[$i]{"wbs"};
|
for ($j=$tmp+1; $j le $masters; $j++) {
|
for ($j=$tmp+1; $j <= $masters; $j++) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} ne 0) {
|
if ($master[$j]{("priority_".($slave[$i]{"wbs"}))} != 0) {
|
if ($master[$j]{"tga_o"} eq 1) {
|
if ($master[$j]{"tga_o"} == 1) {
|
printf OUTFILE " or (%s_%s_o and %s_%s_bg)",$master[$j]{"wbm"},$rename_tga,$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
printf OUTFILE " or (%s_%s_o and %s_%s_bg)",$master[$j]{"wbm"},$rename_tga,$master[$j]{"wbm"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
};
|
};
|
};
|
};
|
| Line 1945... |
Line 1945... |
};
|
};
|
};
|
};
|
};
|
};
|
|
|
sub gen_remap{
|
sub gen_remap{
|
for ($i=1; $i le $masters; $i++) {
|
for ($i=1; $i <= $masters; $i++) {
|
if ($master[$i]{"type"} ne "wo") {
|
if ($master[$i]{"type"} ne "wo") {
|
printf OUTFILE "%s_wbm_i.dat_i <= %s_dat_i;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE "%s_wbm_i.dat_i <= %s_dat_i;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE "%s_wbm_i.ack_i <= %s_ack_i ;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_wbm_i.ack_i <= %s_ack_i ;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
if ($master[$i]{"err_i"} eq 1) {
|
if ($master[$i]{"err_i"} == 1) {
|
printf OUTFILE "%s_wbm_i.err_i <= %s_err_i;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE "%s_wbm_i.err_i <= %s_err_i;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
if ($master[$i]{"rty_i"} eq 1) {
|
if ($master[$i]{"rty_i"} == 1) {
|
printf OUTFILE "%s_wbm_i.rty_i <= %s_rty_i;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
printf OUTFILE "%s_wbm_i.rty_i <= %s_rty_i;\n",$master[$i]{"wbm"},$master[$i]{"wbm"}; };
|
if ($master[$i]{"type"} ne "ro") {
|
if ($master[$i]{"type"} ne "ro") {
|
printf OUTFILE "%s_dat_o <= %s_wbm_o.dat_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_dat_o <= %s_wbm_o.dat_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_we_o <= %s_wbm_o.we_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_we_o <= %s_wbm_o.we_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
};
|
};
|
printf OUTFILE "%s_sel_o <= %s_wbm_o.sel_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_sel_o <= %s_wbm_o.sel_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_adr_o <= %s_wbm_o.adr_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_adr_o <= %s_wbm_o.adr_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
if ($master[$i]{"tgc_o"} eq 1) {
|
if ($master[$i]{"tgc_o"} == 1) {
|
printf OUTFILE "%s_%s_o <= %s_wbm_o.%s_o;\n",$master[$i]{"wbm"},$rename_tgc,$master[$i]{"wbm"},$rename_tgc; };
|
printf OUTFILE "%s_%s_o <= %s_wbm_o.%s_o;\n",$master[$i]{"wbm"},$rename_tgc,$master[$i]{"wbm"},$rename_tgc; };
|
if ($master[$i]{"tga_o"} eq 1) {
|
if ($master[$i]{"tga_o"} == 1) {
|
printf OUTFILE "%s_%s_o <= %s_wbm_o.%s_o;\n",$master[$i]{"wbm"},$rename_tga,$master[$i]{"wbm"},$rename_tga; };
|
printf OUTFILE "%s_%s_o <= %s_wbm_o.%s_o;\n",$master[$i]{"wbm"},$rename_tga,$master[$i]{"wbm"},$rename_tga; };
|
printf OUTFILE "%s_cyc_o <= %s_wbm_o.cyc_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_cyc_o <= %s_wbm_o.cyc_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_stb_o <= %s_wbm_o.stb_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
printf OUTFILE "%s_stb_o <= %s_wbm_o.stb_o;\n",$master[$i]{"wbm"},$master[$i]{"wbm"};
|
};
|
};
|
for ($i=1; $i le $slaves; $i++) {
|
for ($i=1; $i <= $slaves; $i++) {
|
if ($slave[$i]{"type"} ne "wo") {
|
if ($slave[$i]{"type"} ne "wo") {
|
printf OUTFILE "%s_dat_o <= %s_wbs_o.dat_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
printf OUTFILE "%s_dat_o <= %s_wbs_o.dat_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
printf OUTFILE "%s_ack_o <= %s_wbs_o.ack_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_ack_o <= %s_wbs_o.ack_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
if ($slave[$i]{"err_o"} eq 1) {
|
if ($slave[$i]{"err_o"} == 1) {
|
printf OUTFILE "%s_err_o <= %s_wbs_o.err_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
printf OUTFILE "%s_err_o <= %s_wbs_o.err_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
if ($slave[$i]{"rty_o"} eq 1) {
|
if ($slave[$i]{"rty_o"} == 1) {
|
printf OUTFILE "%s_rty_o <= %s_wbs_o.rty_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
printf OUTFILE "%s_rty_o <= %s_wbs_o.rty_o;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"}; };
|
if ($slave[$i]{"type"} ne "ro") {
|
if ($slave[$i]{"type"} ne "ro") {
|
printf OUTFILE "%s_wbs_i.dat_i <= %s_dat_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.dat_i <= %s_dat_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.we_i <= %s_we_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.we_i <= %s_we_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
};
|
};
|
printf OUTFILE "%s_wbs_i.sel_i <= %s_sel_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.sel_i <= %s_sel_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.adr_i <= %s_adr_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.adr_i <= %s_adr_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
if ($slave[$i]{"tgc_i"} eq 1) {
|
if ($slave[$i]{"tgc_i"} == 1) {
|
printf OUTFILE "%s_wbs_i.%s_i <= %s_%s_i;\n",$slave[$i]{"wbs"},$rename_tgc,$slave[$i]{"wbs"},$rename_tgc; };
|
printf OUTFILE "%s_wbs_i.%s_i <= %s_%s_i;\n",$slave[$i]{"wbs"},$rename_tgc,$slave[$i]{"wbs"},$rename_tgc; };
|
if ($slave[$i]{"tga_i"} eq 1) {
|
if ($slave[$i]{"tga_i"} == 1) {
|
printf OUTFILE "%s_wbs_i.%s_i <= %s_%s_i;\n",$slave[$i]{"wbs"},$rename_tga,$slave[$i]{"wbs"},$rename_tga; };
|
printf OUTFILE "%s_wbs_i.%s_i <= %s_%s_i;\n",$slave[$i]{"wbs"},$rename_tga,$slave[$i]{"wbs"},$rename_tga; };
|
printf OUTFILE "%s_wbs_i.cyc_i <= %s_cyc_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.cyc_i <= %s_cyc_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.stb_i <= %s_stb_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
printf OUTFILE "%s_wbs_i.stb_i <= %s_stb_i;\n",$slave[$i]{"wbs"},$slave[$i]{"wbs"};
|
};
|
};
|
};
|
};
|
