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https://opencores.org/ocsvn/wbddr3/wbddr3/trunk
[/] [wbddr3/] [trunk/] [bench/] [cpp/] [Makefile] - Diff between revs 20 and 21
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Rev 20 |
Rev 21 |
Line 39... |
Line 39... |
OBJDIR := obj-pc
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OBJDIR := obj-pc
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CXX := g++
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CXX := g++
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YYMMDD := `date +%Y%m%d`
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YYMMDD := `date +%Y%m%d`
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RTLD := ../../rtl
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RTLD := ../../rtl
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VOBJDR := $(RTLD)/obj_dir
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VOBJDR := $(RTLD)/obj_dir
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VROOT ?= $(shell bash -c 'verilator -V|grep VERILATOR_ROOT | head -1 | sed -e " s/^.*=\s*//"')
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VERILATOR_ROOT ?= $(shell bash -c 'verilator -V|grep VERILATOR_ROOT | head -1 | sed -e " s/^.*=\s*//"')
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# /usr/share/verilator
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VROOT := $(VERILATOR_ROOT)
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VINC := -I$(VROOT)/include -I$(VOBJDR)
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VINC := -I$(VROOT)/include -I$(VOBJDR)
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CFLAGS := -Wall -c -Og -g -I. $(VINC)
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CFLAGS := -Wall -c -Og -g -I. $(VINC)
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SOURCES := pddrsim.cpp ddrsdramsim.cpp ddrsdram_tb.cpp
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SOURCES := pddrsim.cpp ddrsdramsim.cpp ddrsdram_tb.cpp
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VOBJDR := $(RTLD)/obj_dir
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VOBJDR := $(RTLD)/obj_dir
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VLIB := $(VROOT)/include/verilated.cpp
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VLIB := $(VROOT)/include/verilated.cpp
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