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[/] [wbddr3/] [trunk/] [bench/] [cpp/] [ddrsdram_tb.cpp] - Diff between revs 10 and 12

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Rev 10 Rev 12
Line 96... Line 96...
                                m_tickcount,
                                m_tickcount,
                                (m_core->i_wb_cyc)?"CYC":"   ",
                                (m_core->i_wb_cyc)?"CYC":"   ",
                                (m_core->i_wb_stb)?"STB":"   ",
                                (m_core->i_wb_stb)?"STB":"   ",
                                (m_core->o_wb_stall)?"STALL":"     ",
                                (m_core->o_wb_stall)?"STALL":"     ",
                                (m_core->o_wb_ack)?"ACK":"   ",
                                (m_core->o_wb_ack)?"ACK":"   ",
                                (m_core->o_cmd_accepted)?"BUS":"   ",
                                "", // (m_core->o_cmd_accepted)?"BUS":"   ",
                                (m_core->i_wb_we)?"W":"R",
                                (m_core->i_wb_we)?"W":"R",
                                (m_core->i_wb_addr),
                                (m_core->i_wb_addr),
                                (m_core->i_wb_data),
                                (m_core->i_wb_data),
                                (m_core->o_wb_data));
                                (m_core->o_wb_data));
 
 
Line 454... Line 454...
        rdbuf = new unsigned[mlen];
        rdbuf = new unsigned[mlen];
        mbuf  = new unsigned[mlen]; // Match buffer
        mbuf  = new unsigned[mlen]; // Match buffer
        printf("Charging my memory with random values\n");
        printf("Charging my memory with random values\n");
        uload(mlen, rdbuf);
        uload(mlen, rdbuf);
 
 
 
#define CASE_TESTS
#define SINGULAR_WRITE
#define SINGULAR_WRITE
#define SINGULAR_READ
#define SINGULAR_READ
#define BIGPIPELINE_WRITE
#define BIGPIPELINE_WRITE
#define BIGPIPELINE_READ
#define BIGPIPELINE_READ
#define PRIMEVEC_WRITE
#define PRIMEVEC_WRITE
#define PRIMEVEC_READ
#define PRIMEVEC_READ
#define SKIP_WRITE
#define SKIP_WRITE
#define SKIP_READ
#define SKIP_READ
 
 
 
#ifdef  CASE_TESTS
 
        {
 
                unsigned v;
 
                for(int i=0; i<8; i++) {
 
                        tb->wb_write(i, rdbuf[i]);
 
                        if ((v=tb->wb_read(i)) != rdbuf[i]) {
 
                                printf("CASE-1, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[i], i, v);
 
                                goto test_failure;
 
                        }
 
                }
 
        }
 
 
 
        // Now repeat, hitting a different bank with each command
 
        {
 
                unsigned v, a;
 
                for(int i=0; i<8; i++) {
 
                        a = 1087 + i*1031;
 
                        tb->wb_write(a, rdbuf[a]);
 
                        if ((v=tb->wb_read(a)) != rdbuf[a]) {
 
                                printf("CASE-1, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[a], a, v);
 
                                goto test_failure;
 
                        }
 
                }
 
        }
 
 
 
        // And again, hitting the same bank with each command
 
        {
 
                unsigned v, a;
 
                for(int i=0; i<8; i++) {
 
                        a = 1109 + i*1024;
 
                        tb->wb_write(a, rdbuf[a]);
 
                        if ((v=tb->wb_read(a)) != rdbuf[a]) {
 
                                printf("CASE-1, %08x -> MEM[%08x] -> %08x FAILED (R/W not equal)\n", rdbuf[a], a, v);
 
                                goto test_failure;
 
                        }
 
                }
 
        }
 
#endif
 
 
#ifdef  SINGULAR_WRITE
#ifdef  SINGULAR_WRITE
        // First test: singular reads through the memory, followed by
        // First test: singular reads through the memory, followed by
        // singular  writes
        // singular  writes
        printf("Starting the single-read test\n");
        printf("Starting the single-read test\n");
        for(int i=0; i<(int)mlen; i++) {
        for(int i=0; i<(int)mlen; i++) {

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